From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933599AbcA0PKg (ORCPT ); Wed, 27 Jan 2016 10:10:36 -0500 Received: from mx1.redhat.com ([209.132.183.28]:44975 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933566AbcA0PKa (ORCPT ); Wed, 27 Jan 2016 10:10:30 -0500 Date: Wed, 27 Jan 2016 17:10:22 +0200 From: "Michael S. Tsirkin" To: linux-kernel@vger.kernel.org, Linus Torvalds Cc: Davidlohr Bueso , Peter Zijlstra , Ingo Molnar , Thomas Gleixner , "Paul E. McKenney" , the arch/x86 maintainers , Davidlohr Bueso , "H. Peter Anvin" , virtualization , Borislav Petkov , Ingo Molnar , Borislav Petkov , Arnd Bergmann , Andy Lutomirski , Andrey Konovalov Subject: [PATCH v4 2/5] x86: drop a comment left over from X86_OOSTORE Message-ID: <1453904765-11073-3-git-send-email-mst@redhat.com> References: <1453904765-11073-1-git-send-email-mst@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1453904765-11073-1-git-send-email-mst@redhat.com> X-Mutt-Fcc: =sent Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The comment about wmb being non-nop to deal with non-intel CPUs is a left over from before commit 09df7c4c8097 ("x86: Remove CONFIG_X86_OOSTORE"). It makes no sense now: in particular, wmb is not a nop even for regular intel CPUs because of weird use-cases e.g. dealing with WC memory. Drop this comment. Signed-off-by: Michael S. Tsirkin --- arch/x86/include/asm/barrier.h | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/x86/include/asm/barrier.h b/arch/x86/include/asm/barrier.h index a65bdb1..a291745 100644 --- a/arch/x86/include/asm/barrier.h +++ b/arch/x86/include/asm/barrier.h @@ -11,10 +11,6 @@ */ #ifdef CONFIG_X86_32 -/* - * Some non-Intel clones support out of order store. wmb() ceases to be a - * nop for these. - */ #define mb() asm volatile(ALTERNATIVE("lock; addl $0,0(%%esp)", "mfence", \ X86_FEATURE_XMM2) ::: "memory", "cc") #define rmb() asm volatile(ALTERNATIVE("lock; addl $0,0(%%esp)", "lfence", \ -- MST