From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S936110AbcA1B07 (ORCPT ); Wed, 27 Jan 2016 20:26:59 -0500 Received: from mail.kmu-office.ch ([178.209.48.109]:54214 "EHLO mail.kmu-office.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934734AbcA1B05 (ORCPT ); Wed, 27 Jan 2016 20:26:57 -0500 From: Stefan Agner To: linux@arm.linux.org.uk Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Stefan Agner Subject: [PATCH] ARM: don't print missing L2 cache as error Date: Wed, 27 Jan 2016 17:27:19 -0800 Message-Id: <1453944439-1070-1-git-send-email-stefan@agner.ch> X-Mailer: git-send-email 2.7.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Not having a L2 cache controller is a shame, but not an error. Avoid printing an error message if L2 controller initialization returns with ENODEV. Signed-off-by: Stefan Agner --- Hi Russel, We use a multiplatform kernel for two similar SoC's, one with L2 cache the other without. Maybe silently ignore -ENODEV would be an option too, not sure what is preferred here. -- Stefan arch/arm/kernel/irq.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c index 1d45320e..f80c480 100644 --- a/arch/arm/kernel/irq.c +++ b/arch/arm/kernel/irq.c @@ -95,7 +95,9 @@ void __init init_IRQ(void) outer_cache.write_sec = machine_desc->l2c_write_sec; ret = l2x0_of_init(machine_desc->l2c_aux_val, machine_desc->l2c_aux_mask); - if (ret) + if (ret == -ENODEV) + pr_info("L2C: no device found\n"); + else if (ret) pr_err("L2C: failed to init: %d\n", ret); } -- 2.7.0