From: Huang Rui <ray.huang@amd.com>
To: Borislav Petkov <bp@suse.de>,
Peter Zijlstra <peterz@infradead.org>,
"Ingo Molnar" <mingo@kernel.org>,
Andy Lutomirski <luto@amacapital.net>,
"Thomas Gleixner" <tglx@linutronix.de>,
Robert Richter <rric@kernel.org>,
Jacob Shin <jacob.w.shin@gmail.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
"Kan Liang" <kan.liang@intel.com>
Cc: <linux-kernel@vger.kernel.org>, <spg_linux_kernel@amd.com>,
<x86@kernel.org>,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>,
Borislav Petkov <bp@alien8.de>,
Fengguang Wu <fengguang.wu@intel.com>,
Huang Rui <ray.huang@amd.com>
Subject: [PATCH 0/2] perf/x86/msr: Add some new AMD performance event counters
Date: Fri, 29 Jan 2016 16:29:55 +0800 [thread overview]
Message-ID: <1454056197-5893-1-git-send-email-ray.huang@amd.com> (raw)
Hi all,
This serials of patches add two event counters that are PTSC
(performance time-stamp counter) and IRperf (instructions retired
count) for AMD new processors. They are incicated by
CPUID.8000_0001H:ECX[27] and CPUID.8000_0008H:EBX[1] separately.
Thanks,
Rui
Huang Rui (2):
perf/x86/msr: Add AMD performance time-stamp counter support
perf/x86/msr: Add AMD instructions retired performance counter
arch/x86/include/asm/cpufeature.h | 2 ++
arch/x86/include/asm/msr-index.h | 4 ++++
arch/x86/kernel/cpu/perf_event_msr.c | 36 ++++++++++++++++++++++++++----------
3 files changed, 32 insertions(+), 10 deletions(-)
--
1.9.1
next reply other threads:[~2016-01-29 8:30 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-29 8:29 Huang Rui [this message]
2016-01-29 8:29 ` [PATCH 1/2] perf/x86/msr: Add AMD performance time-stamp counter support Huang Rui
2016-03-31 9:22 ` [tip:perf/core] perf/x86/msr: Add AMD PTSC (Performance Time-Stamp Counter) support tip-bot for Huang Rui
2016-01-29 8:29 ` [PATCH 2/2] perf/x86/msr: Add AMD instructions retired performance counter Huang Rui
2016-03-31 9:22 ` [tip:perf/core] perf/x86/msr: Add AMD IRPERF (Instructions Retired) " tip-bot for Huang Rui
2016-03-21 10:09 ` [PATCH 0/2] perf/x86/msr: Add some new AMD performance event counters Huang Rui
2016-03-21 10:31 ` Borislav Petkov
2016-03-21 12:40 ` Peter Zijlstra
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