mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Chen-Yu Tsai <wens@csie.org>
To: Ulf Hansson <ulf.hansson@linaro.org>,
	Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Chen-Yu Tsai <wens@csie.org>, Hans de Goede <hdegoede@redhat.com>,
	linux-mmc@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com
Subject: [PATCH 0/3] mmc: sunxi: Support eMMC DDR modes
Date: Sat, 30 Jan 2016 01:21:45 +0800	[thread overview]
Message-ID: <1454088108-2332-1-git-send-email-wens@csie.org> (raw)

Hi everyone,

This was "mmc: sunxi: Support vqmmc regulator and eMMC DDR modes". vqmmc
support and DT patches were merged even though it was an RFC series, to
my suprise.

These are the remaining patches that add eMMC HS-DDR support to sunxi.

Patch 1 adds timing delays for MMC_DDR52 mode.

Patch 2 adds support for 8 bit eMMC DDR52 mode. Under this mode, the
controller must run at twice the card clock, and different timing delays
are needed.

Patch 3 enables eMMC HS-DDR for sunxi-mmc.


Changes since RFC:

  - Dropped patches that are merged

  - Dropped "mmc: sunxi: Block signal voltage switching (CMD11)".
    According to Ulf, the mmc core won't send this command unless the UHS
    capabilities are set. We don't.

  - Increased f_max to 52 MHz. Clock rate range for 50 MHz timing delay
    also increased to match. See patch 1.


Regards
ChenYu


Chen-Yu Tsai (3):
  mmc: sunxi: Support MMC_DDR52 timing modes
  mmc: sunxi: Support 8 bit eMMC DDR transfer modes
  mmc: sunxi: Enable eMMC HS-DDR (MMC_CAP_1_8V_DDR) support

 drivers/mmc/host/sunxi-mmc.c | 42 ++++++++++++++++++++++++++++++++----------
 1 file changed, 32 insertions(+), 10 deletions(-)

-- 
2.7.0

             reply	other threads:[~2016-01-29 17:22 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-01-29 17:21 Chen-Yu Tsai [this message]
2016-01-29 17:21 ` [PATCH 1/3] mmc: sunxi: Support MMC_DDR52 timing modes Chen-Yu Tsai
2016-01-29 17:21 ` [PATCH 2/3] mmc: sunxi: Support 8 bit eMMC DDR transfer modes Chen-Yu Tsai
2016-01-29 17:21 ` [PATCH 3/3] mmc: sunxi: Enable eMMC HS-DDR (MMC_CAP_1_8V_DDR) support Chen-Yu Tsai
2016-01-31  9:40 ` [linux-sunxi] [PATCH 0/3] mmc: sunxi: Support eMMC DDR modes Hans de Goede
2016-02-02 13:11 ` Ulf Hansson

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1454088108-2332-1-git-send-email-wens@csie.org \
    --to=wens@csie.org \
    --cc=hdegoede@redhat.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mmc@vger.kernel.org \
    --cc=linux-sunxi@googlegroups.com \
    --cc=maxime.ripard@free-electrons.com \
    --cc=ulf.hansson@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®