From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757682AbcBCQSP (ORCPT ); Wed, 3 Feb 2016 11:18:15 -0500 Received: from mailapp01.imgtec.com ([195.59.15.196]:19099 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757489AbcBCQSM (ORCPT ); Wed, 3 Feb 2016 11:18:12 -0500 From: Paul Burton To: , Ralf Baechle CC: Paul Burton , Joshua Kinard , Leonid Yegoshin , , James Hogan , Markos Chandras Subject: [PATCH 1/3] MIPS: Add M6250 PRID & cpu_type_enum values Date: Wed, 3 Feb 2016 16:17:28 +0000 Message-ID: <1454516250-9395-2-git-send-email-paul.burton@imgtec.com> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1454516250-9395-1-git-send-email-paul.burton@imgtec.com> References: <1454516250-9395-1-git-send-email-paul.burton@imgtec.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.100.200.164] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Define the processor ID for the M6250 CPU and add a value to the enum cpu_type_enum for the core. Signed-off-by: Paul Burton --- arch/mips/include/asm/cpu.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index 7908dc2..96b7dd1 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h @@ -122,6 +122,7 @@ #define PRID_IMP_M5150 0xa700 #define PRID_IMP_P5600 0xa800 #define PRID_IMP_I6400 0xa900 +#define PRID_IMP_M6250 0xab00 /* * These are the PRID's for when 23:16 == PRID_COMP_SIBYTE @@ -309,7 +310,7 @@ enum cpu_type_enum { CPU_ALCHEMY, CPU_PR4450, CPU_BMIPS32, CPU_BMIPS3300, CPU_BMIPS4350, CPU_BMIPS4380, CPU_BMIPS5000, CPU_JZRISC, CPU_LOONGSON1, CPU_M14KC, CPU_M14KEC, CPU_INTERAPTIV, CPU_P5600, CPU_PROAPTIV, CPU_1074K, CPU_M5150, - CPU_I6400, CPU_P6600, + CPU_I6400, CPU_P6600, CPU_M6250, /* * MIPS64 class processors -- 2.7.0