From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751283AbcBEX2S (ORCPT ); Fri, 5 Feb 2016 18:28:18 -0500 Received: from mxout1.idt.com ([157.165.5.25]:40099 "EHLO mxout1.idt.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751144AbcBEX2K (ORCPT ); Fri, 5 Feb 2016 18:28:10 -0500 From: Alexandre Bounine To: Andrew Morton Cc: Alexandre Bounine , Matt Porter , Aurelien Jacquiot , Andre van Herk , linux-kernel@vger.kernel.org Subject: [PATCH 03/30] rapidio/tsi721: fix hardcoded MRRS setting Date: Fri, 5 Feb 2016 18:19:19 -0500 Message-Id: <1454714386-15259-4-git-send-email-alexandre.bounine@idt.com> X-Mailer: git-send-email 1.7.8.4 In-Reply-To: <1454714386-15259-1-git-send-email-alexandre.bounine@idt.com> References: <1454714386-15259-1-git-send-email-alexandre.bounine@idt.com> X-TM-AS-MML: disable Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Remove use of hardcoded setting for Maximum Read Request Size (MRRS) value and use one set by PCIe bus driver. Using hardcoded value can cause PCIe bus errors on platforms that have tsi721 device on PCIe path that allows only smaller read request sizes. This fix is applicable to kernel versions starting from v3.2. Signed-off-by: Alexandre Bounine Cc: Matt Porter Cc: Aurelien Jacquiot Cc: Andre van Herk Cc: linux-kernel@vger.kernel.org --- drivers/rapidio/devices/tsi721.c | 6 ++---- 1 files changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/rapidio/devices/tsi721.c b/drivers/rapidio/devices/tsi721.c index eeca70d..f57ee9d 100644 --- a/drivers/rapidio/devices/tsi721.c +++ b/drivers/rapidio/devices/tsi721.c @@ -2426,11 +2426,9 @@ static int tsi721_probe(struct pci_dev *pdev, BUG_ON(!pci_is_pcie(pdev)); - /* Clear "no snoop" and "relaxed ordering" bits, use default MRRS. */ + /* Clear "no snoop" and "relaxed ordering" bits. */ pcie_capability_clear_and_set_word(pdev, PCI_EXP_DEVCTL, - PCI_EXP_DEVCTL_READRQ | PCI_EXP_DEVCTL_RELAX_EN | - PCI_EXP_DEVCTL_NOSNOOP_EN, - PCI_EXP_DEVCTL_READRQ_512B); + PCI_EXP_DEVCTL_RELAX_EN | PCI_EXP_DEVCTL_NOSNOOP_EN, 0); /* Adjust PCIe completion timeout. */ pcie_capability_clear_and_set_word(pdev, PCI_EXP_DEVCTL2, 0xf, 0x2); -- 1.7.8.4