From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751685AbcBHMu1 (ORCPT ); Mon, 8 Feb 2016 07:50:27 -0500 Received: from mx2.suse.de ([195.135.220.15]:60358 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750982AbcBHMuZ (ORCPT ); Mon, 8 Feb 2016 07:50:25 -0500 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: linux-meson@googlegroups.com Cc: Carlo Caione , linux-arm-kernel@lists.infradead.org, Matthias Brugger , Nicolas Saenz , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Greg Kroah-Hartman , Jiri Slaby , linux-serial@vger.kernel.org (open list:SERIAL DRIVERS), linux-kernel@vger.kernel.org (open list) Subject: [PATCH] tty: serial: meson: Add support for XTAL clock input Date: Mon, 8 Feb 2016 13:49:42 +0100 Message-Id: <1454935783-17027-1-git-send-email-afaerber@suse.de> X-Mailer: git-send-email 2.6.2 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Fix the baudrate calculation for 24 MHz XTAL clock found on gxbb platforms. Signed-off-by: Andreas Färber --- Forward-ported from vendor kernel. On top of my meson earlycon patch. drivers/tty/serial/meson_uart.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/tty/serial/meson_uart.c b/drivers/tty/serial/meson_uart.c index 9efcfa2de31e..4415631bab17 100644 --- a/drivers/tty/serial/meson_uart.c +++ b/drivers/tty/serial/meson_uart.c @@ -78,6 +78,7 @@ /* AML_UART_REG5 bits */ #define AML_UART_BAUD_MASK 0x7fffff #define AML_UART_BAUD_USE BIT(23) +#define AML_UART_BAUD_XTAL BIT(24) #define AML_UART_PORT_NUM 6 #define AML_UART_DEV_NAME "ttyAML" @@ -299,7 +300,12 @@ static void meson_uart_change_speed(struct uart_port *port, unsigned long baud) val = readl(port->membase + AML_UART_REG5); val &= ~AML_UART_BAUD_MASK; - val = ((port->uartclk * 10 / (baud * 4) + 5) / 10) - 1; + if (port->uartclk == 24000000) { + val = ((port->uartclk / 3) / baud) - 1; + val |= AML_UART_BAUD_XTAL; + } else { + val = ((port->uartclk * 10 / (baud * 4) + 5) / 10) - 1; + } val |= AML_UART_BAUD_USE; writel(val, port->membase + AML_UART_REG5); } -- 2.6.2