From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752355AbcBKACf (ORCPT ); Wed, 10 Feb 2016 19:02:35 -0500 Received: from mail.kmu-office.ch ([178.209.48.109]:36944 "EHLO mail.kmu-office.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751404AbcBKABx (ORCPT ); Wed, 10 Feb 2016 19:01:53 -0500 From: Stefan Agner To: shawnguo@kernel.org, kernel@pengutronix.de Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Stefan Agner Subject: [PATCH 2/2] ARM: dts: vf-colibri: assign Ethernet clock explicitly Date: Wed, 10 Feb 2016 16:02:26 -0800 Message-Id: <1455148946-26903-2-git-send-email-stefan@agner.ch> X-Mailer: git-send-email 2.7.1 In-Reply-To: <1455148946-26903-1-git-send-email-stefan@agner.ch> References: <1455148946-26903-1-git-send-email-stefan@agner.ch> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Assign Ethernet clock parents explicitly. The Colibri VF61 uses the 50MHz Ethernet clock provided by PLL5. The Vybrid SoC has two ethernet interfaces (fec0 and fec1) which use the same clock source (VF610_CLK_ENET). Therefore this parent configuration affects multiple consumer devices and need to be specified in the clock provider node. Signed-off-by: Stefan Agner --- arch/arm/boot/dts/vf-colibri.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/vf-colibri.dtsi b/arch/arm/boot/dts/vf-colibri.dtsi index c4312c4..8a889af 100644 --- a/arch/arm/boot/dts/vf-colibri.dtsi +++ b/arch/arm/boot/dts/vf-colibri.dtsi @@ -38,6 +38,13 @@ status = "disabled"; }; +&clks { + assigned-clocks = <&clks VF610_CLK_ENET_SEL>, + <&clks VF610_CLK_ENET_TS_SEL>; + assigned-clock-parents = <&clks VF610_CLK_ENET_50M>, + <&clks VF610_CLK_ENET_50M>; +}; + &dspi1 { bus-num = <1>; pinctrl-names = "default"; -- 2.7.1