From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756762AbcBQG4n (ORCPT ); Wed, 17 Feb 2016 01:56:43 -0500 Received: from mailout2.w1.samsung.com ([210.118.77.12]:45813 "EHLO mailout2.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756623AbcBQGz4 (ORCPT ); Wed, 17 Feb 2016 01:55:56 -0500 X-AuditID: cbfec7f5-f79b16d000005389-da-56c4197a9b94 From: Krzysztof Kozlowski To: Kukjin Kim , Krzysztof Kozlowski , Lukasz Majewski , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org Cc: Zhang Rui , Eduardo Valentin , Viresh Kumar , Bartlomiej Zolnierkiewicz , Javier Martinez Canillas Subject: [RFC 1/3] ARM: dts: Add cooling levels for CPUs on exynos5420 Date: Wed, 17 Feb 2016 15:55:26 +0900 Message-id: <1455692128-28504-2-git-send-email-k.kozlowski@samsung.com> X-Mailer: git-send-email 2.5.0 In-reply-to: <1455692128-28504-1-git-send-email-k.kozlowski@samsung.com> References: <1455692128-28504-1-git-send-email-k.kozlowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrOLMWRmVeSWpSXmKPExsVy+t/xa7pVkkfCDDq/KllsnLGe1WL+lWus Fm/ermGyeP3C0KL/8WtmizcPNzNabHoMFL+8aw6bxefeI4wWM87vY7J48rCPzWLjVw8HHo+d s+6yeyze85LJY9OqTjaPO9f2sHlsXlLvsaUfKN63ZRWjx+dNcgEcUVw2Kak5mWWpRfp2CVwZ zU8ECx5zVOx+c4ylgbGPvYuRg0NCwETi/s7gLkZOIFNM4sK99WxdjFwcQgJLGSUuTfvBCuH8 Z5SYve04K0gVm4CxxOblS8CqRASamSTWNU4HSzALPGKUuHDTC8QWFnCTWPT4F1icRUBVYtPa 5SwgNq+Au8Tlyb0sEJvlJBZcSAcJcwp4SOw49JwRxBYCKun6v5tpAiPvAkaGVYyiqaXJBcVJ 6blGesWJucWleel6yfm5mxghwfl1B+PSY1aHGAU4GJV4eFdkHQ4TYk0sK67MPcQowcGsJMLL 8BwoxJuSWFmVWpQfX1Sak1p8iFGag0VJnHfmrvchQgLpiSWp2ampBalFMFkmDk6pBsZu03+L Q481VXuttDif6vVJVOStVOzDFQGGpszv2wxOf332JPkeW1W97PaKr7qPNi3ZKvPykBHriV+f n/Yutg+wOMbwR2LOG9nqOKGdwWUlr7tT7tRINMxw5QoRfbTirkf3588Cvqc9pCQuLJiZr7jd +8CbV985v/MLvClfkby+unKD2fFVoh1KLMUZiYZazEXFiQB16xFCSgIAAA== Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Exynos5420 we support 8 cpufreq steps (600-1300 MHz) for LITTLE and 12 steps for big core (700-1800 MHz). Add respective cooling cells. Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/exynos5420-cpus.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/exynos5420-cpus.dtsi b/arch/arm/boot/dts/exynos5420-cpus.dtsi index 261d25173f61..498ae82e1cb2 100644 --- a/arch/arm/boot/dts/exynos5420-cpus.dtsi +++ b/arch/arm/boot/dts/exynos5420-cpus.dtsi @@ -33,6 +33,9 @@ clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; operating-points-v2 = <&cluster_a15_opp_table>; + cooling-min-level = <0>; + cooling-max-level = <11>; + #cooling-cells = <2>; /* min followed by max */ }; cpu1: cpu@1 { @@ -70,6 +73,9 @@ clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; operating-points-v2 = <&cluster_a7_opp_table>; + cooling-min-level = <0>; + cooling-max-level = <7>; + #cooling-cells = <2>; /* min followed by max */ }; cpu5: cpu@101 { -- 2.5.0