From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757164AbcBWG0M (ORCPT ); Tue, 23 Feb 2016 01:26:12 -0500 Received: from hqemgate14.nvidia.com ([216.228.121.143]:17994 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756890AbcBWG0K (ORCPT ); Tue, 23 Feb 2016 01:26:10 -0500 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Mon, 22 Feb 2016 22:25:07 -0800 From: Alexandre Courbot To: Thierry Reding , =?UTF-8?q?Terje=20Bergstr=C3=B6m?= , Stephen Warren CC: dri-devel@lists.freedesktop.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, gnurou@gmail.com, Alexandre Courbot Subject: [PATCH 2/2] drm/tegra: Set the DMA mask Date: Tue, 23 Feb 2016 15:25:54 +0900 Message-ID: <1456208754-12362-2-git-send-email-acourbot@nvidia.com> X-Mailer: git-send-email 2.7.1 In-Reply-To: <1456208754-12362-1-git-send-email-acourbot@nvidia.com> References: <1456208754-12362-1-git-send-email-acourbot@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The default DMA mask covers a 32 bits address range, but tegradrm can address more than that. Set the DMA mask to the actual addressable range to avoid the use of unneeded bounce buffers. Signed-off-by: Alexandre Courbot --- Thierry, I am not absolutely sure whether the size is correct and applies to all Tegra generations - please let me know if this needs to be reworked. drivers/gpu/drm/tegra/drm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c index bc0555adecaf..503fc9e73521 100644 --- a/drivers/gpu/drm/tegra/drm.c +++ b/drivers/gpu/drm/tegra/drm.c @@ -992,6 +992,7 @@ static int host1x_drm_probe(struct host1x_device *dev) dev_set_drvdata(&dev->dev, drm); of_dma_configure(drm->dev, NULL); + dma_set_mask(drm->dev, DMA_BIT_MASK(34)); err = drm_dev_register(drm, 0); if (err < 0) -- 2.7.1