From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751604AbcBYWFR (ORCPT ); Thu, 25 Feb 2016 17:05:17 -0500 Received: from mail-lf0-f49.google.com ([209.85.215.49]:35989 "EHLO mail-lf0-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750765AbcBYWFO (ORCPT ); Thu, 25 Feb 2016 17:05:14 -0500 From: Joachim Eastwood To: tglx@linutronix.de Cc: Joachim Eastwood , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linus.walleij@linaro.org Subject: [PATCH 0/2] PINT irqchip driver for NXP LPC18xx family Date: Thu, 25 Feb 2016 23:04:45 +0100 Message-Id: <1456437887-24432-1-git-send-email-manabian@gmail.com> X-Mailer: git-send-email 1.8.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The LPC1850 has no less than 3 GPIO interrupt blocks. One of these blocks is called 'gpio pin interrupt' or just PINT. LPC1850 PINT can handle up to 8 interrupts and these have a one-to-one relationship with the main interrupt controller (NVIC). The interrupts on PINT can be either level or edge trigger and supports any polarity. This patch set adds an irqchip driver for the PINT found on lpc18xx. Joachim Eastwood (2): irqchip: add lpc18xx gpio pin interrupt driver devicetree: document NXP LPC1850 PINT irq controller binding .../interrupt-controller/nxp,lpc1850-gpio-pint.txt | 22 ++ drivers/irqchip/Kconfig | 5 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-lpc18xx-gpio-pint.c | 238 +++++++++++++++++++++ 4 files changed, 266 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/nxp,lpc1850-gpio-pint.txt create mode 100644 drivers/irqchip/irq-lpc18xx-gpio-pint.c -- 1.8.0