From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753088AbcB2Jvw (ORCPT ); Mon, 29 Feb 2016 04:51:52 -0500 Received: from hqemgate14.nvidia.com ([216.228.121.143]:13178 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752310AbcB2Jvr (ORCPT ); Mon, 29 Feb 2016 04:51:47 -0500 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Mon, 29 Feb 2016 01:51:30 -0800 From: Wei Ni To: , , , CC: , , , Wei Ni Subject: [PATCH] thermal: tegra_soctherm: fix sign bit of temperature Date: Mon, 29 Feb 2016 17:51:20 +0800 Message-ID: <1456739480-3304-1-git-send-email-wni@nvidia.com> X-Mailer: git-send-email 1.9.1 X-NVConfidentiality: public MIME-Version: 1.0 X-Originating-IP: [10.19.224.146] X-ClientProxiedBy: HKMAIL101.nvidia.com (10.18.16.10) To HKMAIL101.nvidia.com (10.18.16.10) Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The sign bit of temperature readback is bit 0, not bit 1. Change to BIT(0) to fix it. Signed-off-by: Wei Ni --- drivers/thermal/tegra_soctherm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/thermal/tegra_soctherm.c b/drivers/thermal/tegra_soctherm.c index 74ea5765938b..136975220c92 100644 --- a/drivers/thermal/tegra_soctherm.c +++ b/drivers/thermal/tegra_soctherm.c @@ -57,7 +57,7 @@ #define READBACK_VALUE_MASK 0xff00 #define READBACK_VALUE_SHIFT 8 #define READBACK_ADD_HALF BIT(7) -#define READBACK_NEGATE BIT(1) +#define READBACK_NEGATE BIT(0) #define FUSE_TSENSOR8_CALIB 0x180 #define FUSE_SPARE_REALIGNMENT_REG_0 0x1fc -- 1.9.1