From: Xing Zheng <zhengxing@rock-chips.com>
To: linux-rockchip@lists.infradead.org
Cc: heiko@sntech.de, huangtao@rock-chips.com, jay.xu@rock-chips.com,
elaine.zhang@rock-chips.com,
Xing Zheng <zhengxing@rock-chips.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH 4/5] clk: rockchip: add a COMPOSITE_FRACMUX_NOGATE type
Date: Mon, 29 Feb 2016 19:26:00 +0800 [thread overview]
Message-ID: <1456745161-12954-5-git-send-email-zhengxing@rock-chips.com> (raw)
In-Reply-To: <1456745161-12954-1-git-send-email-zhengxing@rock-chips.com>
Because there are some frac clock mux nodes don't need gate node on
the RK3399.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
drivers/clk/rockchip/clk.h | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h
index 36b4938..bfafd67 100644
--- a/drivers/clk/rockchip/clk.h
+++ b/drivers/clk/rockchip/clk.h
@@ -463,6 +463,22 @@ struct rockchip_clk_branch {
.child = ch, \
}
+#define COMPOSITE_FRACMUX_NOGATE(_id, cname, pname, f, mo, df, ch) \
+ { \
+ .id = _id, \
+ .branch_type = branch_fraction_divider, \
+ .name = cname, \
+ .parent_names = (const char *[]){ pname }, \
+ .num_parents = 1, \
+ .flags = f, \
+ .muxdiv_offset = mo, \
+ .div_shift = 16, \
+ .div_width = 16, \
+ .div_flags = df, \
+ .gate_offset = -1, \
+ .child = ch, \
+ }
+
#define MUX(_id, cname, pnames, f, o, s, w, mf) \
{ \
.id = _id, \
--
1.7.9.5
next prev parent reply other threads:[~2016-02-29 11:26 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-29 11:25 [PATCH 0/5] Add more clock compatible features and support the RK3399 clock Xing Zheng
2016-02-29 11:25 ` [PATCH 1/5] clk: rockchip: add more mux parameters for new pll sources Xing Zheng
2016-02-29 11:25 ` [PATCH 2/5] clk: rockchip: Add support for multiple clock providers Xing Zheng
2016-02-29 11:25 ` [PATCH 3/5] clk: rockchip: add new pll-type for rk3399 and similar socs Xing Zheng
2016-02-29 11:26 ` Xing Zheng [this message]
2016-02-29 11:31 ` [PATCH 5/5] clk: rockchip: add clock controller for the RK3399 Xing Zheng
2016-02-29 12:48 ` kbuild test robot
2016-02-29 11:36 ` Xing Zheng
2016-03-01 10:07 [PATCH 0/5] Add more clock compatible features and support the RK3399 clock Xing Zheng
2016-03-01 10:07 ` [PATCH 4/5] clk: rockchip: add a COMPOSITE_FRACMUX_NOGATE type Xing Zheng
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