From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751147AbcCACi0 (ORCPT ); Mon, 29 Feb 2016 21:38:26 -0500 Received: from mailapp01.imgtec.com ([195.59.15.196]:2481 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750736AbcCACiZ (ORCPT ); Mon, 29 Feb 2016 21:38:25 -0500 From: Paul Burton To: CC: Paul Burton , Lars Persson , "Steven J. Hill" , "Huacai Chen" , David Daney , "Aneesh Kumar K.V" , , Jerome Marchand , Ralf Baechle , "Kirill A. Shutemov" , Andrew Morton Subject: [PATCH 0/4] MIPS cache & highmem fixes Date: Tue, 1 Mar 2016 02:37:55 +0000 Message-ID: <1456799879-14711-1-git-send-email-paul.burton@imgtec.com> X-Mailer: git-send-email 2.7.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.100.200.88] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This series fixes up a few issues with our current cache maintenance code, some specific to highmem & some not. It fixes an issue with icache corruption seen on the pistachio SoC & Ci40, and icache corruption seen using highmem on MIPS Malta boards with a P5600 CPU. Applies atop v4.5-rc6. It would be great to squeeze these in for v4.5, but I recognise it's quite late in the cycle & this brokenness has been around for a while so won't object to v4.6. Thanks, Paul Paul Burton (4): MIPS: Flush dcache for flush_kernel_dcache_page MIPS: Flush highmem pages in __flush_dcache_page MIPS: Handle highmem pages in __update_cache MIPS: Sync icache & dcache in set_pte_at arch/mips/include/asm/cacheflush.h | 7 +------ arch/mips/include/asm/pgtable.h | 26 +++++++++++++++++++----- arch/mips/mm/cache.c | 41 +++++++++++++++++++------------------- 3 files changed, 43 insertions(+), 31 deletions(-) -- 2.7.1