From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932615AbcCCOkP (ORCPT ); Thu, 3 Mar 2016 09:40:15 -0500 Received: from smtprelay.synopsys.com ([198.182.47.9]:35614 "EHLO smtprelay.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932469AbcCCOjh (ORCPT ); Thu, 3 Mar 2016 09:39:37 -0500 From: Alexey Brodkin To: linux-kernel@vger.kernel.org Cc: linux-snps-arc@lists.infradead.org, Alexey Brodkin , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , devicetree@vger.kernel.org Subject: [PATCH 2/4 v2] drm: Add DT bindings documentation for ARC PGU display controller Date: Thu, 3 Mar 2016 17:39:14 +0300 Message-Id: <1457015956-30708-3-git-send-email-abrodkin@synopsys.com> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1457015956-30708-1-git-send-email-abrodkin@synopsys.com> References: <1457015956-30708-1-git-send-email-abrodkin@synopsys.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This add DT bindings documentation for ARC PGU display controller. Signed-off-by: Alexey Brodkin Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala Cc: devicetree@vger.kernel.org Cc: linux-snps-arc@lists.infradead.org --- Changes v1 -> v2: * Clean-up .../devicetree/bindings/display/snps,arcpgu.txt | 33 ++++++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/snps,arcpgu.txt diff --git a/Documentation/devicetree/bindings/display/snps,arcpgu.txt b/Documentation/devicetree/bindings/display/snps,arcpgu.txt new file mode 100644 index 0000000..57f3bc8 --- /dev/null +++ b/Documentation/devicetree/bindings/display/snps,arcpgu.txt @@ -0,0 +1,33 @@ +ARC PGU + +This is a display controller found on several development boards produced +by Synopsys. The ARC PGU is an RGB streamer that reads the data from a +framebuffer and sends it to a single digital encoder (usually HDMI). + +Required properties: + - compatible: "snps,arcpgu" + - reg: Physical base address and length of the controller's registers. + - clocks: A list of phandle + clock-specifier pairs, one for each + entry in 'clock-names'. + - clock-names: A list of clock names. For ARC PGU it should contain: + - "pxlclk" for the clock feeding the output PLL of the controller. + +Required sub-nodes: + - port: The PGU connection to an encoder chip. The connection is modelled + using the OF graph bindings specified in + Documentation/devicetree/bindings/graph.txt. + +Example: + +/ { + ... + + pgu@XXXXXXXX { + compatible = "snps,arcpgu"; + reg = <0xXXXXXXXX 0x400>; + clocks = <&clock_node>; + clock-names = "pxlclk"; + }; + + ... +}; -- 2.5.0