From: Wei Ni <wni@nvidia.com>
To: <thierry.reding@gmail.com>, <rui.zhang@intel.com>, <edubezval@gmail.com>
Cc: <MLongnecker@nvidia.com>, <swarren@wwwdotorg.org>,
<mikko.perttunen@kapsi.fi>, <linux-tegra@vger.kernel.org>,
<linux-pm@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
Wei Ni <wni@nvidia.com>
Subject: [PATCH V2] thermal: tegra_soctherm: fix sign bit of temperature
Date: Tue, 8 Mar 2016 11:19:01 +0800 [thread overview]
Message-ID: <1457407141-2167-1-git-send-email-wni@nvidia.com> (raw)
The sign bit of temperature readback is bit 0, not bit 1.
Change to BIT(0) to fix it.
Signed-off-by: Wei Ni <wni@nvidia.com>
Reviewed-by: Matt Longnecker <mlongnecker@nvidia.com>
---
drivers/thermal/tegra_soctherm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/thermal/tegra_soctherm.c b/drivers/thermal/tegra_soctherm.c
index 74ea5765938b..136975220c92 100644
--- a/drivers/thermal/tegra_soctherm.c
+++ b/drivers/thermal/tegra_soctherm.c
@@ -57,7 +57,7 @@
#define READBACK_VALUE_MASK 0xff00
#define READBACK_VALUE_SHIFT 8
#define READBACK_ADD_HALF BIT(7)
-#define READBACK_NEGATE BIT(1)
+#define READBACK_NEGATE BIT(0)
#define FUSE_TSENSOR8_CALIB 0x180
#define FUSE_SPARE_REALIGNMENT_REG_0 0x1fc
--
1.9.1
reply other threads:[~2016-03-08 3:19 UTC|newest]
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