From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Viresh Kumar <vireshk@kernel.org>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Vinod Koul <vinod.koul@intel.com>,
linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org,
Rob Herring <robh+dt@kernel.org>,
Hans-Christian Egtvedt <egtvedt@samfundet.no>,
Tejun Heo <tj@kernel.org>, Mark Brown <broonie@kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Mark Rutland <mark.rutland@arm.com>,
Vineet Gupta <vgupta@synopsys.com>
Subject: [PATCH v3 07/15] dmaengine: dw: substitute dma_read_byaddr by dma_readl_native
Date: Fri, 18 Mar 2016 16:24:46 +0200 [thread overview]
Message-ID: <1458311094-94927-8-git-send-email-andriy.shevchenko@linux.intel.com> (raw)
In-Reply-To: <1458311094-94927-1-git-send-email-andriy.shevchenko@linux.intel.com>
Since struct dw_dma is allocated and regs member is assigned properly we can
use standard IO accessors to the DMA registers.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
drivers/dma/dw/core.c | 8 +++-----
drivers/dma/dw/regs.h | 4 ----
2 files changed, 3 insertions(+), 9 deletions(-)
diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
index 4ac12ee..4748df9 100644
--- a/drivers/dma/dw/core.c
+++ b/drivers/dma/dw/core.c
@@ -1526,7 +1526,7 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata)
pm_runtime_get_sync(chip->dev);
if (!pdata) {
- dw_params = dma_read_byaddr(chip->regs, DW_PARAMS);
+ dw_params = dma_readl(dw, DW_PARAMS);
dev_dbg(chip->dev, "DW_PARAMS: 0x%08x\n", dw_params);
autocfg = dw_params >> DW_PARAMS_EN & 1;
@@ -1626,11 +1626,9 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata)
/* Hardware configuration */
if (autocfg) {
- unsigned int dwc_params;
unsigned int r = DW_DMA_MAX_NR_CHANNELS - i - 1;
- void __iomem *addr = chip->regs + r * sizeof(u32);
-
- dwc_params = dma_read_byaddr(addr, DWC_PARAMS);
+ void __iomem *addr = &__dw_regs(dw)->DWC_PARAMS[r];
+ unsigned int dwc_params = dma_readl_native(addr);
dev_dbg(chip->dev, "DWC_PARAMS[%d]: 0x%08x\n", i,
dwc_params);
diff --git a/drivers/dma/dw/regs.h b/drivers/dma/dw/regs.h
index 59d6cec..feb3a4a 100644
--- a/drivers/dma/dw/regs.h
+++ b/drivers/dma/dw/regs.h
@@ -114,10 +114,6 @@ struct dw_dma_regs {
#define dma_writel_native writel
#endif
-/* To access the registers in early stage of probe */
-#define dma_read_byaddr(addr, name) \
- dma_readl_native((addr) + offsetof(struct dw_dma_regs, name))
-
/* Bitfields in DW_PARAMS */
#define DW_PARAMS_NR_CHAN 8 /* number of channels */
#define DW_PARAMS_NR_MASTER 11 /* number of AHB masters */
--
2.7.0
next prev parent reply other threads:[~2016-03-18 14:30 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-18 14:24 [PATCH v3 00/15] Fixes / cleanups in dw_dmac (affects on few subsystems) Andy Shevchenko
2016-03-18 14:24 ` [PATCH v3 01/15] dmaengine: dw: fix master selection Andy Shevchenko
2016-04-04 17:03 ` Vinod Koul
2016-04-04 17:10 ` Andy Shevchenko
2016-04-06 18:56 ` Vinod Koul
2016-04-06 19:56 ` Andy Shevchenko
2016-04-06 21:09 ` Koul, Vinod
2016-04-07 13:03 ` Andy Shevchenko
2016-04-13 13:36 ` Andy Shevchenko
2016-04-08 13:22 ` [PATCH v3.5 1/1] " Andy Shevchenko
2016-03-18 14:24 ` [PATCH v3 02/15] dmaengine: dw: rename masters to reflect actual topology Andy Shevchenko
2016-03-18 14:24 ` [PATCH v3 03/15] dmaengine: dw: set src and dst master select according to xfer direction Andy Shevchenko
2016-03-18 14:24 ` [PATCH v3 04/15] dmaengine: dw: fix byte order of hw descriptor fields Andy Shevchenko
2016-03-18 14:24 ` [PATCH v3 05/15] dmaengine: dw: set LMS field in descriptors Andy Shevchenko
2016-03-18 14:24 ` [PATCH v3 06/15] dmaengine: dw: clear LLP_[SD]_EN bits in last descriptor of a chain Andy Shevchenko
2016-03-18 14:24 ` Andy Shevchenko [this message]
2016-03-18 14:24 ` [PATCH v3 08/15] dmaengine: dw: revisit data_width property Andy Shevchenko
2016-04-13 15:57 ` Vinod Koul
2016-04-13 16:05 ` Andy Shevchenko
2016-04-13 16:17 ` Vinod Koul
2016-04-13 16:21 ` Andy Shevchenko
2016-04-13 16:40 ` Mark Brown
2016-04-15 12:45 ` Andy Shevchenko
2016-04-16 5:45 ` Vinod Koul
2016-03-18 14:24 ` [PATCH v3 09/15] dmaengine: dw: define counter variables as unsigned int Andy Shevchenko
2016-03-18 14:24 ` [PATCH v3 10/15] dmaengine: dw: keep entire platform data in struct dw_dma Andy Shevchenko
2016-03-18 14:24 ` [PATCH v3 11/15] dmaengine: dw: pass platform data via struct dw_dma_chip Andy Shevchenko
2016-03-18 14:24 ` [PATCH v3 12/15] dmaengine: dw: move dwc->paused to dwc->flags Andy Shevchenko
2016-03-18 14:24 ` [PATCH v3 13/15] dmaengine: dw: move dwc->initialized " Andy Shevchenko
2016-03-18 14:24 ` [PATCH v3 14/15] dmaengine: dw: move residue to a descriptor Andy Shevchenko
2016-03-18 14:24 ` [PATCH v3 15/15] dmaengine: dw: set cdesc to NULL when free cyclic transfers Andy Shevchenko
2016-04-13 16:08 ` [PATCH v3 00/15] Fixes / cleanups in dw_dmac (affects on few subsystems) Vinod Koul
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