From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755911AbcC2Dhh (ORCPT ); Mon, 28 Mar 2016 23:37:37 -0400 Received: from mail-pa0-f52.google.com ([209.85.220.52]:34259 "EHLO mail-pa0-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751834AbcC2DhV (ORCPT ); Mon, 28 Mar 2016 23:37:21 -0400 From: Bjorn Andersson To: Andy Gross Cc: Rob Herring , John Stultz , linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-remoteproc@vger.kernel.org Subject: [PATCH v2 7/9] ARM: dts: qcom: apq8064: Add complete smsm node Date: Mon, 28 Mar 2016 20:37:03 -0700 Message-Id: <1459222625-11440-8-git-send-email-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1459222625-11440-1-git-send-email-bjorn.andersson@linaro.org> References: <1459222625-11440-1-git-send-email-bjorn.andersson@linaro.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Signed-off-by: Bjorn Andersson --- Andy, this is only here for context, please apply separately. Changes since v1: - Added dts patches arch/arm/boot/dts/qcom-apq8064.dtsi | 49 +++++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 9d45c4ef4a97..5a9d68287840 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -124,6 +124,55 @@ hwlocks = <&sfpb_mutex 3>; }; + smsm { + compatible = "qcom,smsm"; + + #address-cells = <1>; + #size-cells = <0>; + + qcom,ipc-1 = <&l2cc 8 4>; + qcom,ipc-2 = <&l2cc 8 14>; + qcom,ipc-3 = <&l2cc 8 23>; + qcom,ipc-4 = <&sic_non_secure 0x4094 0>; + + apps_smsm: apps@0 { + reg = <0>; + #qcom,state-cells = <1>; + }; + + modem_smsm: modem@1 { + reg = <1>; + interrupts = <0 38 IRQ_TYPE_EDGE_RISING>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + q6_smsm: q6@2 { + reg = <2>; + interrupts = <0 89 IRQ_TYPE_EDGE_RISING>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + wcnss_smsm: wcnss@3 { + reg = <3>; + interrupts = <0 204 IRQ_TYPE_EDGE_RISING>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + dsps_smsm: dsps@4 { + reg = <4>; + interrupts = <0 137 IRQ_TYPE_EDGE_RISING>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + soc: soc { #address-cells = <1>; #size-cells = <1>; -- 2.5.0