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From: Lyude <cpaul@redhat.com>
To: intel-gfx@lists.freedesktop.org
Cc: Lyude <cpaul@redhat.com>,
	stable@vger.kernel.org, Daniel Vetter <daniel.vetter@intel.com>,
	Jani Nikula <jani.nikula@linux.intel.com>,
	David Airlie <airlied@linux.ie>,
	dri-devel@lists.freedesktop.org (open list:INTEL DRM DRIVERS
	(excluding Poulsbo, Moorestow...),
	linux-kernel@vger.kernel.org (open list))
Subject: [PATCH] drm/i915/vlv: Enable/disable VGA hotplugging properly
Date: Tue, 29 Mar 2016 16:46:30 -0400	[thread overview]
Message-ID: <1459284390-14485-1-git-send-email-cpaul@redhat.com> (raw)

On Valleyview, VGA hotplugging is controlled through a seperate register
than everything else, VLV_ADPA, which must be explicitly set.

While VGA hotplugging worked(ish) before, it looks like that was mainly
because we'd unintentionally enable it in
valleyview_crt_detect_hotplug() when we did a force trigger. This
doesn't work reliably enough because whenever the display powerwell on
vlv gets disabled, the values set in VLV_ADPA get cleared and
consequently VGA hotplugging gets disabled. This causes bugs such as one
we found on an Intel NUC, where doing the following sequence of
hotplugs:

	- Disconnect all monitors
	- Connect VGA
	- Disconnect VGA
	- Connect HDMI

Would result in hotplugging getting disabled, due to the display
powerwells getting toggled in the process of connecting HDMI.

CC: stable@vger.kernel.org
Signed-off-by: Lyude <cpaul@redhat.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 5aa4239..60592a4 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -3611,6 +3611,7 @@ static void valleyview_display_irqs_install(struct drm_i915_private *dev_priv)
 {
 	u32 pipestat_mask;
 	u32 iir_mask;
+	u32 adpa_reg;
 	enum pipe pipe;
 
 	pipestat_mask = PIPESTAT_INT_STATUS_MASK |
@@ -3627,6 +3628,12 @@ static void valleyview_display_irqs_install(struct drm_i915_private *dev_priv)
 	for_each_pipe(dev_priv, pipe)
 		      i915_enable_pipestat(dev_priv, pipe, pipestat_mask);
 
+	if (IS_VALLEYVIEW(dev_priv)) {
+		adpa_reg = I915_READ(VLV_ADPA);
+		adpa_reg |= ADPA_CRT_HOTPLUG_ENABLE;
+		I915_WRITE(VLV_ADPA, adpa_reg);
+	}
+
 	iir_mask = I915_DISPLAY_PORT_INTERRUPT |
 		   I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
 		   I915_DISPLAY_PIPE_B_EVENT_INTERRUPT;
@@ -3645,8 +3652,15 @@ static void valleyview_display_irqs_uninstall(struct drm_i915_private *dev_priv)
 {
 	u32 pipestat_mask;
 	u32 iir_mask;
+	u32 adpa_reg;
 	enum pipe pipe;
 
+	if (IS_VALLEYVIEW(dev_priv)) {
+		adpa_reg = I915_READ(VLV_ADPA);
+		adpa_reg &= ~ADPA_CRT_HOTPLUG_ENABLE;
+		I915_WRITE(VLV_ADPA, adpa_reg);
+	}
+
 	iir_mask = I915_DISPLAY_PORT_INTERRUPT |
 		   I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
 		   I915_DISPLAY_PIPE_B_EVENT_INTERRUPT;
-- 
2.5.5

             reply	other threads:[~2016-03-29 20:46 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-03-29 20:46 Lyude [this message]
2016-04-15 19:40 ` [PATCH v2 1/2] drm/i915/vlv: Make intel_crt_reset() per-encoder Lyude
2016-04-15 19:40   ` [PATCH v2 2/2] drm/i915/vlv: Reset the ADPA in vlv_display_power_well_init() Lyude

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