From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755362AbcDECqo (ORCPT ); Mon, 4 Apr 2016 22:46:44 -0400 Received: from szxga02-in.huawei.com ([119.145.14.65]:5204 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753244AbcDECqn (ORCPT ); Mon, 4 Apr 2016 22:46:43 -0400 From: Kefeng Wang To: Noam Camus , Greg Kroah-Hartman CC: Andy Shevchenko , Heikki Krogerus , , , , , Kefeng Wang Subject: [PATCH v2] serial: 8250_dw: fix wrong logic in dw8250_check_lcr() Date: Tue, 5 Apr 2016 10:49:06 +0800 Message-ID: <1459824546-9942-1-git-send-email-wangkefeng.wang@huawei.com> X-Mailer: git-send-email 2.6.0.GIT MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.175.100.166] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020202.5703270C.00BA,ss=1,re=0.000,recu=0.000,reip=0.000,cl=1,cld=1,fgs=0, ip=0.0.0.0, so=2013-06-18 04:22:30, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: fd5fc72387d3979d400cc10899bd60a0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Commit cdcea058e510("serial: 8250_dw: Avoid serial_outx code duplicate with new dw8250_check_lcr()") introduce a wrong logic when write val to LCR reg. When CONFIG_64BIT enabled, __raw_writeq is used unconditionally. The __raw_readq/__raw_writeq is introduced by commit bca2092d7897("serial: 8250_dw: Use 64-bit access for OCTEON") for OCTEON, so for !PORT_OCTEON, we better to use coincident write func. Fixes: cdcea058e510("serial: 8250_dw: Avoid serial_outx code duplicate with new dw8250_check_lcr()") Signe:-off-by: Kefeng Wang --- drivers/tty/serial/8250/8250_dw.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c index a3fb95d..003ce60 100644 --- a/drivers/tty/serial/8250/8250_dw.c +++ b/drivers/tty/serial/8250/8250_dw.c @@ -103,16 +103,14 @@ static void dw8250_check_lcr(struct uart_port *p, int value) dw8250_force_idle(p); -#ifdef CONFIG_64BIT - __raw_writeq(value & 0xff, offset); -#else - if (p->iotype == UPIO_MEM32) + if (IS_ENABLED(CONFIG_64BIT) && p->type == PORT_OCTEON) + __raw_writeq(value & 0xff, offset); + else if (p->iotype == UPIO_MEM32) writel(value, offset); else if (p->iotype == UPIO_MEM32BE) iowrite32be(value, offset); else writeb(value, offset); -#endif } /* * FIXME: this deadlocks if port->lock is already held -- 2.6.0.GIT