From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932607AbcDHKYO (ORCPT ); Fri, 8 Apr 2016 06:24:14 -0400 Received: from mail-lb0-f174.google.com ([209.85.217.174]:34801 "EHLO mail-lb0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754035AbcDHKYL (ORCPT ); Fri, 8 Apr 2016 06:24:11 -0400 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= To: Boris Brezillon Cc: Richard Weinberger , linux-mtd@lists.infradead.org, =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , David Woodhouse , Brian Norris , linux-kernel@vger.kernel.org (open list) Subject: [PATCH 3/8] mtd: nand: mxc: set ECC algorithm explicitly Date: Fri, 8 Apr 2016 12:23:46 +0200 Message-Id: <1460111031-8706-4-git-send-email-zajec5@gmail.com> X-Mailer: git-send-email 1.8.4.5 In-Reply-To: <1460111031-8706-1-git-send-email-zajec5@gmail.com> References: <1460111031-8706-1-git-send-email-zajec5@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki --- drivers/mtd/nand/mxc_nand.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c index 854c832..57b1b74 100644 --- a/drivers/mtd/nand/mxc_nand.c +++ b/drivers/mtd/nand/mxc_nand.c @@ -1585,6 +1585,7 @@ static int mxcnd_probe(struct platform_device *pdev) this->ecc.mode = NAND_ECC_HW; } else { this->ecc.mode = NAND_ECC_SOFT; + this->ecc.algo = NAND_ECC_HAMMING; } /* NAND bus width determines access functions used by upper layer */ -- 1.8.4.5