From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754125AbcDNGUv (ORCPT ); Thu, 14 Apr 2016 02:20:51 -0400 Received: from regular1.263xmail.com ([211.150.99.139]:56697 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754048AbcDNGUh (ORCPT ); Thu, 14 Apr 2016 02:20:37 -0400 X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 X-KSVirus-check: 0 X-RL-SENDER: zhangqing@rock-chips.com X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: zhangqing@rock-chips.com X-UNIQUE-TAG: <4fbe1b4bc93087e5da8d21f4d0e325d4> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 From: Elaine Zhang To: heiko@sntech.de, khilman@baylibre.com, xf@rock-chips.com, wxt@rock-chips.com Cc: linux-arm-kernel@lists.infradead.org, huangtao@rock-chips.com, zyw@rock-chips.com, xxx@rock-chips.com, jay.xu@rock-chips.com, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Elaine Zhang Subject: [PATCH v2 1/2] dt-bindings: modify document of Rockchip power domains Date: Thu, 14 Apr 2016 14:20:19 +0800 Message-Id: <1460614820-18865-2-git-send-email-zhangqing@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1460614820-18865-1-git-send-email-zhangqing@rock-chips.com> References: <1460614820-18865-1-git-send-email-zhangqing@rock-chips.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Rockchip Socs contain quality of service (qos) blocks managing priority, bandwidth, etc of the connection of each domain to the interconnect. These blocks loose state when their domain gets disabled and therefore need to be saved when disabling and restored when enabling a power-domain. These qos blocks also are similar over all currently available Rockchip SoCs. Signed-off-by: Elaine Zhang --- Documentation/devicetree/bindings/soc/rockchip/power_domain.txt | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt b/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt index 98085c888d65..6c571a40cd31 100644 --- a/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt +++ b/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt @@ -21,6 +21,13 @@ Required properties for power domain sub nodes: - clocks (optional): phandles to clocks which need to be enabled while power domain switches state. +Qos Example: + + qos_gpu: qos_gpu@ffaf0000 { + compatible ="syscon"; + reg = <0x0 0xffaf0000 0x0 0x20>; + }; + Example: power: power-controller { @@ -32,6 +39,7 @@ Example: pd_gpu { reg = ; clocks = <&cru ACLK_GPU>; + pm_qos = <&qos_gpu>; }; }; -- 1.9.1