From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753344AbcDOTzv (ORCPT ); Fri, 15 Apr 2016 15:55:51 -0400 Received: from mail-wm0-f47.google.com ([74.125.82.47]:36861 "EHLO mail-wm0-f47.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752293AbcDOTzt (ORCPT ); Fri, 15 Apr 2016 15:55:49 -0400 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= To: Boris Brezillon Cc: linux-mtd@lists.infradead.org, =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Richard Weinberger , David Woodhouse , Brian Norris , linux-kernel@vger.kernel.org (open list) Subject: [PATCH 09/12] mtd: nand: fsmc: validate ECC setup by checking algorithm directly Date: Fri, 15 Apr 2016 21:54:09 +0200 Message-Id: <1460750052-16285-10-git-send-email-zajec5@gmail.com> X-Mailer: git-send-email 1.8.4.5 In-Reply-To: <1460750052-16285-1-git-send-email-zajec5@gmail.com> References: <1460750052-16285-1-git-send-email-zajec5@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org NAND core sets ECC algorithm in algo field now and it should be preferred over the mode field. This also prepares driver for dropping NAND_ECC_SOFT_BCH. Signed-off-by: Rafał Miłecki --- drivers/mtd/nand/fsmc_nand.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/fsmc_nand.c b/drivers/mtd/nand/fsmc_nand.c index 1372040..0f8c63f 100644 --- a/drivers/mtd/nand/fsmc_nand.c +++ b/drivers/mtd/nand/fsmc_nand.c @@ -958,9 +958,12 @@ static int __init fsmc_nand_probe(struct platform_device *pdev) nand->ecc.strength = 1; break; + case NAND_ECC_SOFT: case NAND_ECC_SOFT_BCH: - dev_info(&pdev->dev, "Using 4-bit SW BCH ECC scheme\n"); - break; + if (nand->ecc.algo == NAND_ECC_BCH) { + dev_info(&pdev->dev, "Using 4-bit SW BCH ECC scheme\n"); + break; + } default: dev_err(&pdev->dev, "Unsupported ECC mode!\n"); -- 1.8.4.5