From: Paul Burton <paul.burton@imgtec.com>
To: <linux-mips@linux-mips.org>, Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <james.hogan@imgtec.com>,
Paul Burton <paul.burton@imgtec.com>,
Paul Gortmaker <paul.gortmaker@windriver.com>,
<linux-kernel@vger.kernel.org>
Subject: [PATCH v2 06/13] MIPS: mm: Unify pte_page definition
Date: Mon, 18 Apr 2016 10:35:26 +0100 [thread overview]
Message-ID: <1460972133-16973-7-git-send-email-paul.burton@imgtec.com> (raw)
In-Reply-To: <1460972133-16973-1-git-send-email-paul.burton@imgtec.com>
The same definition for pte_page is duplicated for the MIPS32
PHYS_ADDR_T_64BIT case & the generic case. Unify them by moving a single
definition outside of preprocessor conditionals.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
---
Changes in v2: None
arch/mips/include/asm/pgtable-32.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/mips/include/asm/pgtable-32.h b/arch/mips/include/asm/pgtable-32.h
index 832e216..181bd8e 100644
--- a/arch/mips/include/asm/pgtable-32.h
+++ b/arch/mips/include/asm/pgtable-32.h
@@ -104,7 +104,7 @@ static inline void pmd_clear(pmd_t *pmdp)
}
#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
-#define pte_page(x) pfn_to_page(pte_pfn(x))
+
#define pte_pfn(x) (((unsigned long)((x).pte_high >> _PFN_SHIFT)) | (unsigned long)((x).pte_low << _PAGE_PRESENT_SHIFT))
static inline pte_t
pfn_pte(unsigned long pfn, pgprot_t prot)
@@ -120,8 +120,6 @@ pfn_pte(unsigned long pfn, pgprot_t prot)
#else
-#define pte_page(x) pfn_to_page(pte_pfn(x))
-
#ifdef CONFIG_CPU_VR41XX
#define pte_pfn(x) ((unsigned long)((x).pte >> (PAGE_SHIFT + 2)))
#define pfn_pte(pfn, prot) __pte(((pfn) << (PAGE_SHIFT + 2)) | pgprot_val(prot))
@@ -131,6 +129,8 @@ pfn_pte(unsigned long pfn, pgprot_t prot)
#endif
#endif /* defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32) */
+#define pte_page(x) pfn_to_page(pte_pfn(x))
+
#define __pgd_offset(address) pgd_index(address)
#define __pud_offset(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
#define __pmd_offset(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
--
2.8.0
next prev parent reply other threads:[~2016-04-18 9:37 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1460972133-16973-1-git-send-email-paul.burton@imgtec.com>
2016-04-18 9:35 ` [PATCH v2 01/13] MIPS: Separate XPA CPU feature into LPA and MVH Paul Burton
2016-04-18 9:35 ` [PATCH v2 02/13] MIPS: Fix HTW config on XPA kernel without LPA enabled Paul Burton
2016-04-18 9:35 ` [PATCH v2 03/13] MIPS: Remove redundant asm/pgtable-bits.h inclusions Paul Burton
2016-04-18 12:36 ` Sergei Shtylyov
2016-04-18 9:35 ` [PATCH v2 04/13] MIPS: Use enums to make asm/pgtable-bits.h readable Paul Burton
2016-04-18 9:35 ` Paul Burton [this message]
2016-04-18 9:35 ` [PATCH v2 08/13] MIPS: mm: Don't clobber $1 on XPA TLB refill Paul Burton
2016-04-18 9:35 ` [PATCH v2 09/13] MIPS: mm: Pass scratch register through to iPTE_SW Paul Burton
2016-04-18 9:35 ` [PATCH v2 10/13] MIPS: mm: Be more explicit about PTE mode bit handling Paul Burton
2016-04-18 9:35 ` [PATCH v2 11/13] MIPS: mm: Simplify build_update_entries Paul Burton
2016-04-18 9:35 ` [PATCH v2 12/13] MIPS: mm: Don't do MTHC0 if XPA not present Paul Burton
2016-04-18 9:35 ` [PATCH v2 13/13] MIPS: mm: Panic if an XPA kernel is run without RIXI Paul Burton
2016-04-18 10:04 ` James Hogan
[not found] ` <1460972133-16973-8-git-send-email-paul.burton@imgtec.com>
2016-04-18 14:34 ` [PATCH v2 07/13] MIPS: mm: Fix MIPS32 36b physical addressing (alchemy, netlogic) Manuel Lauss
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