From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752346AbcDZOtR (ORCPT ); Tue, 26 Apr 2016 10:49:17 -0400 Received: from foss.arm.com ([217.140.101.70]:55115 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752161AbcDZOtN (ORCPT ); Tue, 26 Apr 2016 10:49:13 -0400 From: Suzuki K Poulose To: linux-arm-kernel@lists.infradead.org Cc: mark.rutland@arm.com, marc.zyngier@arm.com, linux-kernel@vger.kernel.org, will.deacon@arm.com, catalin.marinas@arm.com, Vadim.Lomovtsev@caviumnetworks.com, Suzuki K Poulose Subject: [PATCH v5 3/5] irqchip/gic: Restore CPU interface checking Date: Tue, 26 Apr 2016 15:48:58 +0100 Message-Id: <1461682140-7131-4-git-send-email-suzuki.poulose@arm.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1461682140-7131-1-git-send-email-suzuki.poulose@arm.com> References: <1461682140-7131-1-git-send-email-suzuki.poulose@arm.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Marc Zyngier When introducing the whole CPU feature detection framework, we lost the capability to detect a mismatched GIC configuration (using the GICv2 MMIO interface, but having the system register interface enabled). In order to solve this, use the new this_cpu_has_cap() helper. Also move the check to the CPU interface path in order to catch systems where the first CPU has been correctly configured, but the secondaries are not. Signed-off-by: Marc Zyngier Signed-off-by: Suzuki K Poulose Acked-by: Catalin Marinas --- drivers/irqchip/irq-gic.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index 282344b..095bb5b 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -55,7 +55,7 @@ static void gic_check_cpu_features(void) { - WARN_TAINT_ONCE(cpus_have_cap(ARM64_HAS_SYSREG_GIC_CPUIF), + WARN_TAINT_ONCE(this_cpu_has_cap(ARM64_HAS_SYSREG_GIC_CPUIF), TAINT_CPU_OUT_OF_SPEC, "GICv3 system registers enabled, broken firmware!\n"); } @@ -490,6 +490,7 @@ static void gic_cpu_init(struct gic_chip_data *gic) * Get what the GIC says our CPU mask is. */ BUG_ON(cpu >= NR_GIC_CPU_IF); + gic_check_cpu_features(); cpu_mask = gic_get_cpumask(gic); gic_cpu_map[cpu] = cpu_mask; @@ -1021,8 +1022,6 @@ static void __init __gic_init_bases(unsigned int gic_nr, int irq_start, BUG_ON(gic_nr >= CONFIG_ARM_GIC_MAX_NR); - gic_check_cpu_features(); - gic = &gic_data[gic_nr]; /* Initialize irq_chip */ -- 1.7.9.5