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From: Lijun Ou <oulijun@huawei.com>
To: <dledford@redhat.com>, <sean.hefty@intel.com>,
	<hal.rosenstock@gmail.com>, <davem@davemloft.net>,
	<jeffrey.t.kirsher@intel.com>, <jiri@mellanox.com>,
	<ogerlitz@mellanox.com>
Cc: <linux-rdma@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<netdev@vger.kernel.org>, <gongyangming@huawei.com>,
	<xiaokun@huawei.com>, <tangchaofei@huawei.com>,
	<oulijun@huawei.com>, <haifeng.wei@huawei.com>,
	<yisen.zhuang@huawei.com>, <yankejian@huawei.com>,
	<charles.chenxin@huawei.com>, <linuxarm@huawei.com>
Subject: [PATCH v6 04/21] IB/hns: Add RoCE engine reset function
Date: Thu, 28 Apr 2016 20:09:39 +0800	[thread overview]
Message-ID: <1461845396-61306-5-git-send-email-oulijun@huawei.com> (raw)
In-Reply-To: <1461845396-61306-1-git-send-email-oulijun@huawei.com>

This patch mainly configured some profile resoure. for example,
vendor_id, hardware version, and some data structure sizes so on.

Signed-off-by: Wei Hu <xavier.huwei@huawei.com>
Signed-off-by: Nenglong Zhao <zhaonenglong@hisilicon.com>
Signed-off-by: Lijun Ou <oulijun@huawei.com>
---
 drivers/infiniband/hw/hns/hns_roce_device.h |  7 ++++
 drivers/infiniband/hw/hns/hns_roce_hw_v1.c  | 54 +++++++++++++++++++++++++++++
 drivers/infiniband/hw/hns/hns_roce_hw_v1.h  | 17 +++++++++
 drivers/infiniband/hw/hns/hns_roce_main.c   | 16 ++++++++-
 4 files changed, 93 insertions(+), 1 deletion(-)
 create mode 100644 drivers/infiniband/hw/hns/hns_roce_hw_v1.c
 create mode 100644 drivers/infiniband/hw/hns/hns_roce_hw_v1.h

diff --git a/drivers/infiniband/hw/hns/hns_roce_device.h b/drivers/infiniband/hw/hns/hns_roce_device.h
index b48f518..24ac1a8 100644
--- a/drivers/infiniband/hw/hns/hns_roce_device.h
+++ b/drivers/infiniband/hw/hns/hns_roce_device.h
@@ -33,6 +33,10 @@ struct hns_roce_caps {
 	u8			num_ports;
 };
 
+struct hns_roce_hw {
+	int (*reset)(struct hns_roce_dev *hr_dev, u32 val);
+};
+
 struct hns_roce_dev {
 	struct ib_device	ib_dev;
 	struct platform_device  *pdev;
@@ -44,6 +48,9 @@ struct hns_roce_dev {
 
 	int			cmd_mod;
 	int			loop_idc;
+	struct hns_roce_hw	*hw;
 };
 
+extern struct hns_roce_hw hns_roce_hw_v1;
+
 #endif /* _HNS_ROCE_DEVICE_H */
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v1.c b/drivers/infiniband/hw/hns/hns_roce_hw_v1.c
new file mode 100644
index 0000000..9bd2939
--- /dev/null
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v1.c
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2016 Hisilicon Limited.
+ *
+ * Authors: Wei Hu <xavier.huwei@huawei.com>
+ * Authors: Nenglong Zhao <zhaonenglong@hisilicon.com>
+ * Authors: Lijun Ou <oulijun@huawei.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+#include "hns_roce_device.h"
+#include "hns_roce_hw_v1.h"
+
+/**
+ * hns_roce_v1_reset - reset roce
+ * @hr_dev: roce device struct pointer
+ * @val: 1 -- drop reset, 0 -- reset
+ * return 0 - success , negative --fail
+ */
+int hns_roce_v1_reset(struct hns_roce_dev *hr_dev, u32 val)
+{
+	struct device_node *dsaf_node;
+	struct device *dev = &hr_dev->pdev->dev;
+	struct device_node *np = dev->of_node;
+	int ret;
+
+	dsaf_node = of_parse_phandle(np, "dsaf-handle", 0);
+
+	if (!val) {
+		ret = hns_dsaf_roce_reset(&dsaf_node->fwnode, 0);
+	} else {
+		ret = hns_dsaf_roce_reset(&dsaf_node->fwnode, 0);
+		if (ret)
+			return ret;
+
+		msleep(SLEEP_TIME_INTERVAL);
+		ret = hns_dsaf_roce_reset(&dsaf_node->fwnode, 1);
+	}
+
+		return ret;
+}
+
+struct hns_roce_hw hns_roce_hw_v1 = {
+	.reset = hns_roce_v1_reset,
+};
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v1.h b/drivers/infiniband/hw/hns/hns_roce_hw_v1.h
new file mode 100644
index 0000000..164041d
--- /dev/null
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v1.h
@@ -0,0 +1,17 @@
+/*
+ * Copyright (c) 2016 Hisilicon Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef _HNS_ROCE_HW_V1_H
+#define _HNS_ROCE_HW_V1_H
+
+#define SLEEP_TIME_INTERVAL		20
+
+extern int hns_dsaf_roce_reset(struct fwnode_handle *dsaf_fwnode, u32 val);
+
+#endif
diff --git a/drivers/infiniband/hw/hns/hns_roce_main.c b/drivers/infiniband/hw/hns/hns_roce_main.c
index 1616148..2334ab0 100644
--- a/drivers/infiniband/hw/hns/hns_roce_main.c
+++ b/drivers/infiniband/hw/hns/hns_roce_main.c
@@ -53,7 +53,9 @@ int hns_roce_get_cfg(struct hns_roce_dev *hr_dev)
 	struct platform_device *pdev = NULL;
 	struct resource *res;
 
-	if (!of_device_is_compatible(np, "hisilicon,hns-roce-v1")) {
+	if (of_device_is_compatible(np, "hisilicon,hns-roce-v1")) {
+		hr_dev->hw = &hns_roce_hw_v1;
+	} else {
 		dev_err(dev, "device no compatible!\n");
 		return -EINVAL;
 	}
@@ -98,6 +100,10 @@ int hns_roce_get_cfg(struct hns_roce_dev *hr_dev)
 	return 0;
 }
 
+int hns_roce_engine_reset(struct hns_roce_dev *hr_dev, u32 val)
+{
+	return hr_dev->hw->reset(hr_dev, val);
+}
 /**
 * hns_roce_probe - RoCE driver entrance
 * @pdev: pointer to platform device
@@ -138,6 +144,12 @@ static int hns_roce_probe(struct platform_device *pdev)
 		goto error_failed_get_cfg;
 	}
 
+	ret = hns_roce_engine_reset(hr_dev, 1);
+	if (ret) {
+		dev_err(dev, "Reset roce engine failed!\n");
+		goto error_failed_get_cfg;
+	}
+
 error_failed_get_cfg:
 	ib_dealloc_device(&hr_dev->ib_dev);
 
@@ -152,6 +164,8 @@ static int hns_roce_remove(struct platform_device *pdev)
 {
 	struct hns_roce_dev *hr_dev = platform_get_drvdata(pdev);
 
+	(void)hns_roce_engine_reset(hr_dev, 0);
+
 	ib_dealloc_device(&hr_dev->ib_dev);
 
 	return 0;
-- 
1.9.1

  parent reply	other threads:[~2016-04-28 12:08 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-04-28 12:09 [PATCH v6 00/21] Add HiSilicon RoCE driver Lijun Ou
2016-04-28 12:09 ` [PATCH v6 01/21] net: hns: Add reset function support for " Lijun Ou
2016-04-28 12:09 ` [PATCH v6 02/21] devicetree: bindings: IB: Add binding document for HiSilicon RoCE Lijun Ou
2016-04-28 12:09 ` [PATCH v6 03/21] IB/hns: Add initial main frame driver and get cfg info Lijun Ou
2016-04-28 12:09 ` Lijun Ou [this message]
2016-04-28 12:09 ` [PATCH v6 05/21] IB/hns: Add initial profile resource Lijun Ou
2016-04-28 12:09 ` [PATCH v6 06/21] IB/hns: Add initial cmd operation Lijun Ou
2016-04-28 12:09 ` [PATCH v6 07/21] IB/hns: Add event queue support Lijun Ou
2016-04-28 12:09 ` [PATCH v6 08/21] IB/hns: Add icm support Lijun Ou
2016-04-28 12:09 ` [PATCH v6 09/21] IB/hns: Add hca support Lijun Ou
2016-04-28 12:09 ` [PATCH v6 10/21] IB/hns: Add process flow to init RoCE engine Lijun Ou
2016-04-28 12:09 ` [PATCH v6 11/21] IB/hns: Add IB device registration Lijun Ou
2016-04-28 12:09 ` [PATCH v6 12/21] IB/hns: Set mtu and gid support Lijun Ou
2016-04-28 12:09 ` [PATCH v6 13/21] IB/hns: Add interface of the protocol stack registration Lijun Ou
2016-04-28 12:09 ` [PATCH v6 14/21] IB/hns: Add operations support for IB device and port Lijun Ou
2016-04-28 12:09 ` [PATCH v6 15/21] IB/hns: Add PD operations support Lijun Ou
2016-04-28 12:09 ` [PATCH v6 16/21] IB/hns: Add ah " Lijun Ou
2016-04-28 12:09 ` [PATCH v6 17/21] IB/hns: Add QP " Lijun Ou
2016-04-28 12:09 ` [PATCH v6 18/21] IB/hns: Add CQ " Lijun Ou
2016-04-28 12:09 ` [PATCH v6 19/21] IB/hns: Add memory region " Lijun Ou
2016-04-28 12:09 ` [PATCH v6 20/21] IB/hns: Kconfig and Makefile for RoCE module Lijun Ou
2016-04-28 12:09 ` [PATCH v6 21/21] MAINTAINERS: Add maintainers for HiSilicon RoCE driver Lijun Ou
2016-05-03 18:48 ` [PATCH v6 00/21] Add " Leon Romanovsky
2016-05-04 11:31   ` oulijun

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