From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754808AbcEBRo1 (ORCPT ); Mon, 2 May 2016 13:44:27 -0400 Received: from mail-pa0-f44.google.com ([209.85.220.44]:36117 "EHLO mail-pa0-f44.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754659AbcEBRo0 (ORCPT ); Mon, 2 May 2016 13:44:26 -0400 From: Moritz Fischer To: dwmw2@infradead.org Cc: computersforpeace@gmail.com, ezequiel@vanguardiasur.com.ar, zajec5@gmail.com, boris.brezillon@free-electrons.com, jteki@openedev.com, furquan@google.com, cyrille.pitchen@atmel.com, moritz.fischer.private@gmail.com, linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, Moritz Fischer Subject: [PATCH] mtd: spi-nor: Add support for Micron n25q016a Date: Mon, 2 May 2016 10:44:10 -0700 Message-Id: <1462211050-30264-1-git-send-email-moritz.fischer@ettus.com> X-Mailer: git-send-email 2.5.5 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This commit adds support in the spi-nor driver for the N25Q016A, a 16Mbit SPI NOR flash from Micron. Signed-off-by: Moritz Fischer --- Hi, attached patch adds support for N25Q016a from Micron. I have another set of changes that adds support for the 64 byte part of this (and other N25Q Micron chips) that I'll send in follow up patches. Question: Checkpatch complains about lines over 80 chars which happens all over the place in drivers/mtd/spi-nor/spi-nor.c in the tables Does anyone care? If so I can submit a patch that cleans that up, as follow up. Cheers, Moritz --- drivers/mtd/spi-nor/spi-nor.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index 157841d..885ab0f 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -860,6 +860,7 @@ static const struct flash_info spi_nor_ids[] = { { "mx66l1g55g", INFO(0xc2261b, 0, 64 * 1024, 2048, SPI_NOR_QUAD_READ) }, /* Micron */ + { "n25q016a", INFO(0x20bb15, 0x1000, 64 * 1024,32, SECT_4K | SPI_NOR_QUAD_READ) }, { "n25q032", INFO(0x20ba16, 0, 64 * 1024, 64, SPI_NOR_QUAD_READ) }, { "n25q032a", INFO(0x20bb16, 0, 64 * 1024, 64, SPI_NOR_QUAD_READ) }, { "n25q064", INFO(0x20ba17, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_QUAD_READ) }, -- 2.5.5