From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756870AbcECXsB (ORCPT ); Tue, 3 May 2016 19:48:01 -0400 Received: from mail-gw2-out.broadcom.com ([216.31.210.63]:52549 "EHLO mail-gw2-out.broadcom.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756295AbcECXsA (ORCPT ); Tue, 3 May 2016 19:48:00 -0400 X-IronPort-AV: E=Sophos;i="5.24,574,1455004800"; d="scan'208";a="94648255" From: Ray Jui To: Thomas Gleixner , Jason Cooper , Marc Zyngier Cc: linux-kernel@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com, linux-arm-kernel@lists.infradead.org, Ray Jui , Alex Barba Subject: [PATCH 1/2] dt-bindings: arm,gic: Indtroduce optional property 'arm,msi-offset-spi' for gicv2m Date: Tue, 3 May 2016 16:47:24 -0700 Message-Id: <1462319245-32532-2-git-send-email-ray.jui@broadcom.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1462319245-32532-1-git-send-email-ray.jui@broadcom.com> References: <1462319245-32532-1-git-send-email-ray.jui@broadcom.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Update the GICv2m binding document by adding an optional property 'arm,msi-offset-spi'. Some implementations of gicv2m have an erratum where the MSI data is the SPI number subtracted by an offset. This is required for the correct MSI interrupt to be triggered. Signed-off-by: Ray Jui --- Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt index 793c20f..550960f 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt @@ -140,6 +140,12 @@ Optional properties: value, this property should contain the number of SPIs assigned to the frame, overriding the HW value. +- arm,msi-offset-spi: Some implementations of gicv2m have an erratum where + the MSI data is the SPI number subtracted by an offset. + This is required for the correct MSI interrupt to be + triggered. This property should contain the required + offset. + Example: interrupt-controller@e1101000 { -- 2.1.4