From: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
To: <pbonzini@redhat.com>, <rkrcmar@redhat.com>, <joro@8bytes.org>,
<bp@alien8.de>, <gleb@kernel.org>, <alex.williamson@redhat.com>
Cc: <kvm@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<wei@redhat.com>, <sherry.hurwitz@amd.com>,
Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Subject: [PART1 V5 12/13] svm: Do not intercept CR8 when enable AVIC
Date: Wed, 4 May 2016 14:09:51 -0500 [thread overview]
Message-ID: <1462388992-25242-13-git-send-email-Suravee.Suthikulpanit@amd.com> (raw)
In-Reply-To: <1462388992-25242-1-git-send-email-Suravee.Suthikulpanit@amd.com>
When enable AVIC:
* Do not intercept CR8 since this should be handled by AVIC HW.
* Also, we don't need to sync cr8/V_TPR and APIC backing page.
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
---
arch/x86/kvm/svm.c | 16 ++++++++++++----
1 file changed, 12 insertions(+), 4 deletions(-)
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index d35fd61e..721e514 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -1092,7 +1092,8 @@ static void init_vmcb(struct vcpu_svm *svm)
set_cr_intercept(svm, INTERCEPT_CR0_WRITE);
set_cr_intercept(svm, INTERCEPT_CR3_WRITE);
set_cr_intercept(svm, INTERCEPT_CR4_WRITE);
- set_cr_intercept(svm, INTERCEPT_CR8_WRITE);
+ if (!kvm_vcpu_apicv_active(&svm->vcpu))
+ set_cr_intercept(svm, INTERCEPT_CR8_WRITE);
set_dr_intercepts(svm);
@@ -4077,11 +4078,17 @@ static void svm_set_irq(struct kvm_vcpu *vcpu)
SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_INTR;
}
+static inline bool svm_in_nested_interrupt_shadow(struct kvm_vcpu *vcpu)
+{
+ return is_guest_mode(vcpu) && (vcpu->arch.hflags & HF_VINTR_MASK);
+}
+
static void update_cr8_intercept(struct kvm_vcpu *vcpu, int tpr, int irr)
{
struct vcpu_svm *svm = to_svm(vcpu);
- if (is_guest_mode(vcpu) && (vcpu->arch.hflags & HF_VINTR_MASK))
+ if (svm_in_nested_interrupt_shadow(vcpu) ||
+ kvm_vcpu_apicv_active(vcpu))
return;
clr_cr_intercept(svm, INTERCEPT_CR8_WRITE);
@@ -4254,7 +4261,7 @@ static inline void sync_cr8_to_lapic(struct kvm_vcpu *vcpu)
{
struct vcpu_svm *svm = to_svm(vcpu);
- if (is_guest_mode(vcpu) && (vcpu->arch.hflags & HF_VINTR_MASK))
+ if (svm_in_nested_interrupt_shadow(vcpu))
return;
if (!is_cr_intercept(svm, INTERCEPT_CR8_WRITE)) {
@@ -4268,7 +4275,8 @@ static inline void sync_lapic_to_cr8(struct kvm_vcpu *vcpu)
struct vcpu_svm *svm = to_svm(vcpu);
u64 cr8;
- if (is_guest_mode(vcpu) && (vcpu->arch.hflags & HF_VINTR_MASK))
+ if (svm_in_nested_interrupt_shadow(vcpu) ||
+ kvm_vcpu_apicv_active(vcpu))
return;
cr8 = kvm_get_cr8(vcpu);
--
1.9.1
next prev parent reply other threads:[~2016-05-04 19:11 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-04 19:09 [PART1 V5 00/13] KVM: x86: Introduce SVM AVIC support Suravee Suthikulpanit
2016-05-04 19:09 ` [PART1 V5 01/13] KVM: x86: Misc LAPIC changes to expose helper functions Suravee Suthikulpanit
2016-05-04 19:09 ` [PART1 V5 02/13] KVM: x86: Rename kvm_apic_get_reg to kvm_lapic_get_reg Suravee Suthikulpanit
2016-05-04 19:09 ` [PART1 V5 03/13] KVM: x86: Introducing kvm_x86_ops VM init/destroy hooks Suravee Suthikulpanit
2016-05-04 19:09 ` [PART1 V5 04/13] KVM: x86: Introducing kvm_x86_ops VCPU blocking/unblocking hooks Suravee Suthikulpanit
2016-05-04 19:09 ` [PART1 V5 05/13] KVM: split kvm_vcpu_wake_up from kvm_vcpu_kick Suravee Suthikulpanit
2016-05-04 19:09 ` [PART1 V5 06/13] svm: Introduce new AVIC VMCB registers Suravee Suthikulpanit
2016-05-04 19:09 ` [PART1 V5 07/13] KVM: x86: Detect and Initialize AVIC support Suravee Suthikulpanit
2016-05-09 10:27 ` Borislav Petkov
2016-05-10 9:14 ` Borislav Petkov
2016-05-10 14:43 ` Paolo Bonzini
2016-05-10 16:24 ` Borislav Petkov
2016-05-10 17:00 ` Paolo Bonzini
2016-05-10 17:06 ` Borislav Petkov
2016-05-04 19:09 ` [PART1 V5 08/13] svm: Add interrupt injection via AVIC Suravee Suthikulpanit
2016-05-10 9:19 ` Borislav Petkov
2016-05-10 14:50 ` Paolo Bonzini
2016-06-01 4:02 ` Suravee Suthikulpanit
2016-05-04 19:09 ` [PART1 V5 09/13] svm: Add VMEXIT handlers for AVIC Suravee Suthikulpanit
2016-05-04 19:09 ` [PART1 V5 10/13] KVM: x86: Introducing kvm_x86_ops.apicv_post_state_restore Suravee Suthikulpanit
2016-05-04 19:09 ` [PART1 V5 11/13] svm: Do not expose x2APIC when enable AVIC Suravee Suthikulpanit
2016-05-04 19:09 ` Suravee Suthikulpanit [this message]
2016-05-10 15:12 ` [PART1 V5 12/13] svm: Do not intercept CR8 " Paolo Bonzini
2016-05-04 19:09 ` [PART1 V5 13/13] svm: Manage vcpu load/unload " Suravee Suthikulpanit
2016-05-10 15:43 ` Paolo Bonzini
2016-05-17 12:09 ` Paolo Bonzini
2016-06-01 18:18 ` Suravee Suthikulpanit
2016-06-01 18:37 ` Paolo Bonzini
2016-05-10 14:57 ` [PART1 V5 00/13] KVM: x86: Introduce SVM AVIC support Paolo Bonzini
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