From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755418AbcEDXrU (ORCPT ); Wed, 4 May 2016 19:47:20 -0400 Received: from mail-gw1-out.broadcom.com ([216.31.210.62]:31383 "EHLO mail-gw1-out.broadcom.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754680AbcEDXrT (ORCPT ); Wed, 4 May 2016 19:47:19 -0400 X-IronPort-AV: E=Sophos;i="5.24,579,1455004800"; d="scan'208";a="94430480" From: Ray Jui To: Thomas Gleixner , Jason Cooper , Marc Zyngier Cc: linux-kernel@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com, linux-arm-kernel@lists.infradead.org, Ray Jui , Alex Barba Subject: [PATCH v2] Workaround for Broadcom NS2 gicv2m implementation Date: Wed, 4 May 2016 16:47:14 -0700 Message-Id: <1462405635-27864-1-git-send-email-ray.jui@broadcom.com> X-Mailer: git-send-email 2.1.4 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Alex Barba discovered Broadcom NS2 GICv2m implementation has an erratum where the MSI data needs to be the SPI number subtracted by an offset of 32, for the correct MSI interrupt to be triggered. We are now implementating the workaround based on readings from the MSI_IIDR register. Patch series is developed based on Linux v4.6-rc1 and available at: https://github.com/Broadcom/arm64-linux/tree/gicv2m-iproc-v2 Changes from v1: - Changed from DT based approach to the approch similar to APM that is based on readings from the MSI_IIDR register Ray Jui (1): irqchip/gic-v2m: Add workaround for Broadcom NS2 GICv2m erratum drivers/irqchip/irq-gic-v2m.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) -- 2.1.4