From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757044AbcEEX37 (ORCPT ); Thu, 5 May 2016 19:29:59 -0400 Received: from mail-gw2-out.broadcom.com ([216.31.210.63]:17493 "EHLO mail-gw2-out.broadcom.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753798AbcEEX3f (ORCPT ); Thu, 5 May 2016 19:29:35 -0400 X-IronPort-AV: E=Sophos;i="5.24,584,1455004800"; d="scan'208";a="94800476" From: Jon Mason To: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com Subject: [PATCH 2/3] ARM: dts: NSP: modify second CPU address Date: Thu, 5 May 2016 19:29:31 -0400 Message-Id: <1462490972-13566-2-git-send-email-jonmason@broadcom.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1462490972-13566-1-git-send-email-jonmason@broadcom.com> References: <1462490972-13566-1-git-send-email-jonmason@broadcom.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org NSP B0 has a different address for the second core. Since there should not be any Ax versions in the field, it should be safe to universally change this. Signed-off-by: Jon Mason --- arch/arm/boot/dts/bcm-nsp.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi index a44bf29..1759e65 100644 --- a/arch/arm/boot/dts/bcm-nsp.dtsi +++ b/arch/arm/boot/dts/bcm-nsp.dtsi @@ -57,7 +57,7 @@ compatible = "arm,cortex-a9"; next-level-cache = <&L2>; enable-method = "brcm,bcm-nsp-smp"; - secondary-boot-reg = <0xffff042c>; + secondary-boot-reg = <0xffff0fec>; reg = <0x1>; }; }; -- 1.9.1