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From: Jon Hunter <jonathanh@nvidia.com>
To: Marc Zyngier <marc.zyngier@arm.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>,
	<linux-kernel@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
	Jon Hunter <jonathanh@nvidia.com>
Subject: [PATCH 03/11] irqchip: Mask the non-type/sense bits when translating an IRQ
Date: Tue, 10 May 2016 16:14:37 +0100	[thread overview]
Message-ID: <1462893285-13515-4-git-send-email-jonathanh@nvidia.com> (raw)
In-Reply-To: <1462893285-13515-1-git-send-email-jonathanh@nvidia.com>

The firmware parameter that contains the IRQ sense bits may also contain
other data. When return the IRQ type, bits outside of these sense bits
should be masked. If these bits are not masked and
irq_create_fwspec_mapping() is called to map an IRQ, then the comparison
of the type returned from irq_domain_translate() will never match
that returned by irq_get_trigger_type() (because this function masks the
none sense bits) and so we will always call irq_set_irq_type() to program
the type even if it was not really necessary.

Currently, the downside to this is unnecessarily re-programmming the type
but nevertheless this should be avoided.

The Tegra LIC and TI Crossbar irqchips all have client instances (from
reviewing the device-tree sources) where bits outside the IRQ sense bits
are set, but do not mask these bits. Therefore, ensure these bits are
masked for these irqchips.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
---
 drivers/irqchip/irq-crossbar.c | 2 +-
 drivers/irqchip/irq-tegra.c    | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 75573fa431ba..1eef56a89b1f 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -183,7 +183,7 @@ static int crossbar_domain_translate(struct irq_domain *d,
 			return -EINVAL;
 
 		*hwirq = fwspec->param[1];
-		*type = fwspec->param[2];
+		*type = fwspec->param[2] & IRQ_TYPE_SENSE_MASK;
 		return 0;
 	}
 
diff --git a/drivers/irqchip/irq-tegra.c b/drivers/irqchip/irq-tegra.c
index 50be9639e27e..e902f081e16c 100644
--- a/drivers/irqchip/irq-tegra.c
+++ b/drivers/irqchip/irq-tegra.c
@@ -235,7 +235,7 @@ static int tegra_ictlr_domain_translate(struct irq_domain *d,
 			return -EINVAL;
 
 		*hwirq = fwspec->param[1];
-		*type = fwspec->param[2];
+		*type = fwspec->param[2] & IRQ_TYPE_SENSE_MASK;
 		return 0;
 	}
 
-- 
2.1.4

  parent reply	other threads:[~2016-05-10 15:15 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-10 15:14 [PATCH 00/11] Various IRQ and GIC fixes and clean-ups Jon Hunter
2016-05-10 15:14 ` [PATCH 01/11] genirq: Ensure IRQ descriptor is valid when setting-up the IRQ Jon Hunter
2016-05-10 15:14 ` [PATCH 02/11] irqdomain: Warn if we fail to set the IRQ type Jon Hunter
2016-05-10 17:25   ` Marc Zyngier
2016-05-10 18:00     ` Jon Hunter
2016-05-10 18:06       ` Jon Hunter
2016-05-10 15:14 ` Jon Hunter [this message]
2016-05-10 15:14 ` [PATCH 04/11] irqchip/gic: Don't unnecessarily write the IRQ configuration Jon Hunter
2016-05-10 15:14 ` [PATCH 05/11] irqchip/gic: WARN if setting the interrupt type for a PPI fails Jon Hunter
2016-05-10 15:14 ` [PATCH 06/11] irqchip/gic: Don't initialise chip if mapping IO space fails Jon Hunter
2016-05-10 15:14 ` [PATCH 07/11] irqchip/gic: Remove static irq_chip definition for eoimode1 Jon Hunter
2016-05-10 15:14 ` [PATCH 08/11] irqchip/gic: Return an error if GIC initialisation fails Jon Hunter
2016-05-10 15:14 ` [PATCH 09/11] irqchip/gic: Pass GIC pointer to save/restore functions Jon Hunter
2016-05-10 15:14 ` [PATCH 10/11] irqchip/gic: Store GIC configuration parameters Jon Hunter
2016-05-10 15:14 ` [PATCH 11/11] irqchip/gic: Add helper functions for GIC setup and teardown Jon Hunter

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