From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752779AbcEJWBz (ORCPT ); Tue, 10 May 2016 18:01:55 -0400 Received: from mail-pf0-f179.google.com ([209.85.192.179]:35355 "EHLO mail-pf0-f179.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751650AbcEJWBx (ORCPT ); Tue, 10 May 2016 18:01:53 -0400 From: Stephen Boyd To: Andy Gross , David Brown Cc: linux-arm@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH] arm64: dts: qcom: Add msm8916 PMU node Date: Tue, 10 May 2016 15:01:49 -0700 Message-Id: <1462917709-29789-1-git-send-email-stephen.boyd@linaro.org> X-Mailer: git-send-email 2.8.0.rc4 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the PMU so we can get proper perf event support on this SoC. Signed-off-by: Stephen Boyd --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 96812007850e..c440fd6bc5cd 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -91,6 +91,11 @@ }; }; + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = ; + }; + timer { compatible = "arm,armv8-timer"; interrupts = , -- 2.8.0.rc4