From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932600AbcELPUw (ORCPT ); Thu, 12 May 2016 11:20:52 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:4461 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932549AbcELPUU (ORCPT ); Thu, 12 May 2016 11:20:20 -0400 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Thu, 12 May 2016 08:19:18 -0700 From: Jon Hunter To: Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Stephen Warren , Thierry Reding CC: Kevin Hilman , Geert Uytterhoeven , Grygorii Strashko , Lars-Peter Clausen , Linus Walleij , , , , Jon Hunter Subject: [PATCH V4 8/9] dt-bindings: arm-gic: Add documentation for Tegra210 AGIC Date: Thu, 12 May 2016 16:19:31 +0100 Message-ID: <1463066372-13115-9-git-send-email-jonathanh@nvidia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1463066372-13115-1-git-send-email-jonathanh@nvidia.com> References: <1463066372-13115-1-git-send-email-jonathanh@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Tegra AGIC is an interrupt controller that is compatible with the ARM GIC-400, however, it is a 2nd level controller and requires runtime power-management because it is outside the main CPU complex. Ideally, the AGIC would use the existing "arm,gic-400" compatibility string, but because of the power management requirements it cannot be initialised early and is initialised by a platform driver. Therefore, to distinguish between the Tegra AGIC and a normal GIC-400, and to ensure that the appropriate driver initialises the AGIC, add the compatible string and clock information for the AGIC to the GIC device-tree binding documentation. Signed-off-by: Jon Hunter --- Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt index 793c20ff8fcc..5393e2a45a42 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt @@ -21,6 +21,7 @@ Main node required properties: "arm,pl390" "arm,tc11mp-gic" "brcm,brahma-b15-gic" + "nvidia,tegra210-agic" "qcom,msm-8660-qgic" "qcom,msm-qgic2" - interrupt-controller : Identifies the node as an interrupt controller @@ -68,7 +69,7 @@ Optional "ic_clk" (for "arm,arm11mp-gic") "PERIPHCLKEN" (for "arm,cortex-a15-gic") "PERIPHCLK", "PERIPHCLKEN" (for "arm,cortex-a9-gic") - "clk" (for "arm,gic-400") + "clk" (for "arm,gic-400" and "nvidia,tegra210") "gclk" (for "arm,pl390") - power-domains : A phandle and PM domain specifier as defined by bindings of -- 2.1.4