From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755434AbcEQOb2 (ORCPT ); Tue, 17 May 2016 10:31:28 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:23777 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750758AbcEQOb1 (ORCPT ); Tue, 17 May 2016 10:31:27 -0400 From: Paul Burton To: , Ralf Baechle CC: Matt Redfearn , Paul Burton , Guenter Roeck , Qais Yousef , Sergei Shtylyov , , "Thomas Gleixner" , Jason Cooper , "Joe Perches" , James Hogan , "Markos Chandras" , Marc Zyngier Subject: [PATCH 0/3] External Interrupt Controller (EIC) fixes Date: Tue, 17 May 2016 15:31:03 +0100 Message-ID: <1463495466-29689-1-git-send-email-paul.burton@imgtec.com> X-Mailer: git-send-email 2.8.2 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.100.200.141] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This series fixes a few small issues with support for External Interrupt Controllers (cpu_has_veic), ensuring that it is configured to service all interrupts by default & that when a GIC is present it's enabled when expected. Applies atop v4.6. Paul Burton (3): MIPS: Clear Status IPL field when using EIC MIPS: smp-cps: Clear Status IPL field when using EIC irqchip: mips-gic: Setup EIC mode on each CPU if it's in use arch/mips/kernel/irq.c | 3 +++ arch/mips/kernel/smp-cps.c | 8 ++++++-- drivers/irqchip/irq-mips-gic.c | 10 +++++++++- 3 files changed, 18 insertions(+), 3 deletions(-) -- 2.8.2