From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755475AbcEQObn (ORCPT ); Tue, 17 May 2016 10:31:43 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:60637 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750758AbcEQObm (ORCPT ); Tue, 17 May 2016 10:31:42 -0400 From: Paul Burton To: , Ralf Baechle CC: Matt Redfearn , Paul Burton , Guenter Roeck , Sergei Shtylyov , , "Joe Perches" , James Hogan Subject: [PATCH 1/3] MIPS: Clear Status IPL field when using EIC Date: Tue, 17 May 2016 15:31:04 +0100 Message-ID: <1463495466-29689-2-git-send-email-paul.burton@imgtec.com> X-Mailer: git-send-email 2.8.2 In-Reply-To: <1463495466-29689-1-git-send-email-paul.burton@imgtec.com> References: <1463495466-29689-1-git-send-email-paul.burton@imgtec.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.100.200.141] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org When using an external interrupt controller (EIC) the interrupt mask bits in the cop0 Status register are reused for the Interrupt Priority Level, and any interrupts with a priority lower than the field will be ignored. Clear the field to 0 by default such that all interrupts are serviced. Without doing so we default to arbitrarily ignoring all or some subset of interrupts. Signed-off-by: Paul Burton --- arch/mips/kernel/irq.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c index 8eb5af8..f25f7ea 100644 --- a/arch/mips/kernel/irq.c +++ b/arch/mips/kernel/irq.c @@ -54,6 +54,9 @@ void __init init_IRQ(void) for (i = 0; i < NR_IRQS; i++) irq_set_noprobe(i); + if (cpu_has_veic) + clear_c0_status(ST0_IM); + arch_init_irq(); } -- 2.8.2