From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752386AbcEXAWD (ORCPT ); Mon, 23 May 2016 20:22:03 -0400 Received: from mail-by2on0061.outbound.protection.outlook.com ([207.46.100.61]:18880 "EHLO na01-by2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751107AbcEXAV6 (ORCPT ); Mon, 23 May 2016 20:21:58 -0400 Authentication-Results: arndb.de; dkim=none (message not signed) header.d=none;arndb.de; dmarc=none action=none header.from=caviumnetworks.com; From: Yury Norov To: , , , , , , , CC: , , , , , , , , , , , , , , , , Andrew Pinski Subject: [PATCH 13/23] arm64: introduce is_a32_task and is_a32_thread (for AArch32 compat) Date: Tue, 24 May 2016 03:04:42 +0300 Message-ID: <1464048292-30136-14-git-send-email-ynorov@caviumnetworks.com> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1464048292-30136-1-git-send-email-ynorov@caviumnetworks.com> References: <1464048292-30136-1-git-send-email-ynorov@caviumnetworks.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [50.233.148.158] X-ClientProxiedBy: DM2PR0501CA0025.namprd05.prod.outlook.com (10.162.29.163) To BN4PR07MB2227.namprd07.prod.outlook.com (10.164.63.145) X-MS-Office365-Filtering-Correlation-Id: 6f1192a9-7a64-4d0b-b810-08d383672ca5 X-Microsoft-Exchange-Diagnostics: 1;BN4PR07MB2227;2:x4YijBBGmHUZsuQuUHCQKQ2jkS4tIXt/AeOGceFbHROvD6ziRxj9SLc0eICUfnm5wbNdFAoSxbQde4R9VJGIC10bREySofLq66NOWZJq38NQ/w9LN2WGNGii0LhF62IQ+Q8VGOUuQDGOupjKbzNZsMtz3YRy9c0KxDx6qL2Nrnzy/OR6gsWowTShR+WVd2Je;3:O3AkcXjVSC2p/6/938PheaKvSpZ+DaDIs7g4O8Qf6m7L1a848OwLfgY9gqj+x7eLrB78COdniRHKE1IdBXYNjOPTlnRoYwzZNVFU0CbXTUdtvyqjt/jGqgsmrUPhN3AK;25:svdczaREM1L3KJ/2zFCedxAVaISs1d2BGuabc39Qv3uYrwqCG84euVW5NY0hQ0X9GvRfEdImTOdWAavRRuhN5L0Jdv0odv62vAdH+KyG+A/mFx+YktNvjWT7cbGu/LTk7zUlZl/FUZBItvr8/jIvOCnOS3O2h4/sGQObBQqf6tDvOFRc5B+hxKVopGiSWzLxU8qzF2V14lZwZMZkmJMNEfd18osxnu1aXOoo4+VjVAN4lagke6+6JblA+1phkwRNOAK0d1C8LqND5BMCFEuvGDzoJ7wfIa976TOdAES7ZSZjErA+n0H4herk78Edk8XcGpMEWRAYiFyIzNDJ01eGCmtJYRwxkR1CJFXKt0j/Iy0ybDXquEGVp9xdJElUyifBy5Xx5dN+0clVmZoCR6lDSneEbA0HYSTgsp/+L4Uff1U= X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BN4PR07MB2227; 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This patch introduces is_a32_compat_task and is_a32_thread so it is easier to say this is a a32 specific thread or a generic compat thread/task. Corresponding functions are located in to avoid mess in headers. Some files include both and , and this is wrong because has already included. It was fixed too. Signed-off-by: Yury Norov Signed-off-by: Philipp Tomsich Signed-off-by: Christoph Muellner Signed-off-by: Andrew Pinski Reviewed-by: David Daney --- arch/arm64/include/asm/compat.h | 19 ++---------- arch/arm64/include/asm/elf.h | 10 +++---- arch/arm64/include/asm/ftrace.h | 2 +- arch/arm64/include/asm/is_compat.h | 58 ++++++++++++++++++++++++++++++++++++ arch/arm64/include/asm/memory.h | 3 +- arch/arm64/include/asm/processor.h | 5 ++-- arch/arm64/include/asm/syscall.h | 2 +- arch/arm64/include/asm/thread_info.h | 2 +- arch/arm64/kernel/hw_breakpoint.c | 10 +++---- arch/arm64/kernel/perf_regs.c | 2 +- arch/arm64/kernel/process.c | 7 ++--- arch/arm64/kernel/ptrace.c | 11 ++++--- arch/arm64/kernel/signal.c | 4 +-- arch/arm64/kernel/traps.c | 3 +- 14 files changed, 91 insertions(+), 47 deletions(-) create mode 100644 arch/arm64/include/asm/is_compat.h diff --git a/arch/arm64/include/asm/compat.h b/arch/arm64/include/asm/compat.h index eb8432b..df2f72d 100644 --- a/arch/arm64/include/asm/compat.h +++ b/arch/arm64/include/asm/compat.h @@ -24,6 +24,8 @@ #include #include +#include + #define COMPAT_USER_HZ 100 #ifdef __AARCH64EB__ #define COMPAT_UTS_MACHINE "armv8b\0\0" @@ -298,23 +300,6 @@ struct compat_shmid64_ds { compat_ulong_t __unused5; }; -static inline int is_compat_task(void) -{ - return test_thread_flag(TIF_32BIT); -} - -static inline int is_compat_thread(struct thread_info *thread) -{ - return test_ti_thread_flag(thread, TIF_32BIT); -} - -#else /* !CONFIG_COMPAT */ - -static inline int is_compat_thread(struct thread_info *thread) -{ - return 0; -} - #endif /* CONFIG_COMPAT */ #endif /* __KERNEL__ */ #endif /* __ASM_COMPAT_H */ diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h index 24ed037..b5437c5 100644 --- a/arch/arm64/include/asm/elf.h +++ b/arch/arm64/include/asm/elf.h @@ -16,6 +16,10 @@ #ifndef __ASM_ELF_H #define __ASM_ELF_H +#ifndef __ASSEMBLY__ +#include +#endif + #include /* @@ -152,13 +156,9 @@ extern int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp); /* 1GB of VA */ -#ifdef CONFIG_COMPAT -#define STACK_RND_MASK (test_thread_flag(TIF_32BIT) ? \ +#define STACK_RND_MASK (is_compat_task() ? \ 0x7ff >> (PAGE_SHIFT - 12) : \ 0x3ffff >> (PAGE_SHIFT - 12)) -#else -#define STACK_RND_MASK (0x3ffff >> (PAGE_SHIFT - 12)) -#endif #ifdef CONFIG_COMPAT diff --git a/arch/arm64/include/asm/ftrace.h b/arch/arm64/include/asm/ftrace.h index caa955f..0feb28a 100644 --- a/arch/arm64/include/asm/ftrace.h +++ b/arch/arm64/include/asm/ftrace.h @@ -54,7 +54,7 @@ static inline unsigned long ftrace_call_adjust(unsigned long addr) #define ARCH_TRACE_IGNORE_COMPAT_SYSCALLS static inline bool arch_trace_is_compat_syscall(struct pt_regs *regs) { - return is_compat_task(); + return is_a32_compat_task(); } #endif /* ifndef __ASSEMBLY__ */ diff --git a/arch/arm64/include/asm/is_compat.h b/arch/arm64/include/asm/is_compat.h new file mode 100644 index 0000000..6139b5a --- /dev/null +++ b/arch/arm64/include/asm/is_compat.h @@ -0,0 +1,58 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#ifndef __ASM_IS_COMPAT_H +#define __ASM_IS_COMPAT_H +#ifndef __ASSEMBLY__ + +#include + +#ifdef CONFIG_AARCH32_EL0 + +static inline int is_a32_compat_task(void) +{ + return test_thread_flag(TIF_32BIT); +} + +static inline int is_a32_compat_thread(struct thread_info *thread) +{ + return test_ti_thread_flag(thread, TIF_32BIT); +} + +#else + +static inline int is_a32_compat_task(void) + +{ + return 0; +} + +static inline int is_a32_compat_thread(struct thread_info *thread) +{ + return 0; +} + +#endif /* CONFIG_AARCH32_EL0 */ + +#ifdef CONFIG_COMPAT + +static inline int is_compat_task(void) +{ + return is_a32_compat_task(); +} + +#endif /* CONFIG_COMPAT */ + +#endif /* !__ASSEMBLY__ */ +#endif /* __ASM_IS_COMPAT_H */ diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h index 12f8a00..a66a0f7 100644 --- a/arch/arm64/include/asm/memory.h +++ b/arch/arm64/include/asm/memory.h @@ -26,6 +26,7 @@ #include #include #include +#include /* * Allow for constants defined here to be used from assembly code @@ -61,7 +62,7 @@ #ifdef CONFIG_COMPAT #define TASK_SIZE_32 UL(0x100000000) -#define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \ +#define TASK_SIZE (is_compat_task() ? \ TASK_SIZE_32 : TASK_SIZE_64) #define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk, TIF_32BIT) ? \ TASK_SIZE_32 : TASK_SIZE_64) diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h index 5bbdbb4..1eccf47 100644 --- a/arch/arm64/include/asm/processor.h +++ b/arch/arm64/include/asm/processor.h @@ -30,6 +30,7 @@ #include #include +#include #include #include #include @@ -41,7 +42,7 @@ #define STACK_TOP_MAX TASK_SIZE_64 #ifdef CONFIG_COMPAT #define AARCH32_VECTORS_BASE 0xffff0000 -#define STACK_TOP (test_thread_flag(TIF_32BIT) ? \ +#define STACK_TOP (is_compat_task() ? \ AARCH32_VECTORS_BASE : STACK_TOP_MAX) #else #define STACK_TOP STACK_TOP_MAX @@ -94,7 +95,7 @@ struct thread_struct { #define task_user_tls(t) \ ({ \ unsigned long *__tls; \ - if (is_compat_thread(task_thread_info(t))) \ + if (is_a32_compat_thread(task_thread_info(t))) \ __tls = &(t)->thread.tp2_value; \ else \ __tls = &(t)->thread.tp_value; \ diff --git a/arch/arm64/include/asm/syscall.h b/arch/arm64/include/asm/syscall.h index 709a574..ce09641 100644 --- a/arch/arm64/include/asm/syscall.h +++ b/arch/arm64/include/asm/syscall.h @@ -113,7 +113,7 @@ static inline void syscall_set_arguments(struct task_struct *task, */ static inline int syscall_get_arch(void) { - if (is_compat_task()) + if (is_a32_compat_task()) return AUDIT_ARCH_ARM; return AUDIT_ARCH_AARCH64; diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h index abd64bd..4daa559 100644 --- a/arch/arm64/include/asm/thread_info.h +++ b/arch/arm64/include/asm/thread_info.h @@ -118,7 +118,7 @@ static inline struct thread_info *current_thread_info(void) #define TIF_FREEZE 19 #define TIF_RESTORE_SIGMASK 20 #define TIF_SINGLESTEP 21 -#define TIF_32BIT 22 /* 32bit process */ +#define TIF_32BIT 22 /* AARCH32 process */ #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) diff --git a/arch/arm64/kernel/hw_breakpoint.c b/arch/arm64/kernel/hw_breakpoint.c index b45c95d..baa1eba 100644 --- a/arch/arm64/kernel/hw_breakpoint.c +++ b/arch/arm64/kernel/hw_breakpoint.c @@ -164,7 +164,7 @@ enum hw_breakpoint_ops { HW_BREAKPOINT_RESTORE }; -static int is_compat_bp(struct perf_event *bp) +static int is_a32_compat_bp(struct perf_event *bp) { struct task_struct *tsk = bp->hw.target; @@ -175,7 +175,7 @@ static int is_compat_bp(struct perf_event *bp) * deprecated behaviour if we use unaligned watchpoints in * AArch64 state. */ - return tsk && is_compat_thread(task_thread_info(tsk)); + return tsk && is_a32_compat_thread(task_thread_info(tsk)); } /** @@ -435,7 +435,7 @@ static int arch_build_bp_info(struct perf_event *bp) * Watchpoints can be of length 1, 2, 4 or 8 bytes. */ if (info->ctrl.type == ARM_BREAKPOINT_EXECUTE) { - if (is_compat_bp(bp)) { + if (is_a32_compat_bp(bp)) { if (info->ctrl.len != ARM_BREAKPOINT_LEN_2 && info->ctrl.len != ARM_BREAKPOINT_LEN_4) return -EINVAL; @@ -492,7 +492,7 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp) * AArch32 tasks expect some simple alignment fixups, so emulate * that here. */ - if (is_compat_bp(bp)) { + if (is_a32_compat_bp(bp)) { if (info->ctrl.len == ARM_BREAKPOINT_LEN_8) alignment_mask = 0x7; else @@ -679,7 +679,7 @@ static int watchpoint_handler(unsigned long addr, unsigned int esr, info = counter_arch_bp(wp); /* AArch32 watchpoints are either 4 or 8 bytes aligned. */ - if (is_compat_task()) { + if (is_a32_compat_task()) { if (info->ctrl.len == ARM_BREAKPOINT_LEN_8) alignment_mask = 0x7; else diff --git a/arch/arm64/kernel/perf_regs.c b/arch/arm64/kernel/perf_regs.c index 3f62b35..a79058f 100644 --- a/arch/arm64/kernel/perf_regs.c +++ b/arch/arm64/kernel/perf_regs.c @@ -45,7 +45,7 @@ int perf_reg_validate(u64 mask) u64 perf_reg_abi(struct task_struct *task) { - if (is_compat_thread(task_thread_info(task))) + if (is_a32_compat_thread(task_thread_info(task))) return PERF_SAMPLE_REGS_ABI_32; else return PERF_SAMPLE_REGS_ABI_64; diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c index 8062482..746f2d3 100644 --- a/arch/arm64/kernel/process.c +++ b/arch/arm64/kernel/process.c @@ -47,7 +47,6 @@ #include #include -#include #include #include #include @@ -211,7 +210,7 @@ static void tls_thread_flush(void) { asm ("msr tpidr_el0, xzr"); - if (is_compat_task()) { + if (is_a32_compat_task()) { current->thread.tp_value = 0; /* @@ -263,7 +262,7 @@ int copy_thread(unsigned long clone_flags, unsigned long stack_start, asm("mrs %0, tpidr_el0" : "=r" (*task_user_tls(p))); if (stack_start) { - if (is_compat_thread(task_thread_info(p))) + if (is_a32_compat_thread(task_thread_info(p))) childregs->compat_sp = stack_start; /* 16-byte aligned stack mandatory on AArch64 */ else if (stack_start & 15) @@ -303,7 +302,7 @@ static void tls_thread_switch(struct task_struct *next) *task_user_tls(current) = tpidr; tpidr = *task_user_tls(next); - tpidrro = is_compat_thread(task_thread_info(next)) ? + tpidrro = is_a32_compat_thread(task_thread_info(next)) ? next->thread.tp_value : 0; asm( diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c index aa79e81..38a09338 100644 --- a/arch/arm64/kernel/ptrace.c +++ b/arch/arm64/kernel/ptrace.c @@ -38,7 +38,6 @@ #include #include -#include #include #include #include @@ -85,7 +84,7 @@ static void ptrace_hbptriggered(struct perf_event *bp, #ifdef CONFIG_AARCH32_EL0 int i; - if (!is_compat_task()) + if (!is_a32_compat_task()) goto send_sig; for (i = 0; i < ARM_MAX_BRP; ++i) { @@ -1203,9 +1202,9 @@ const struct user_regset_view *task_user_regset_view(struct task_struct *task) * 32-bit children use an extended user_aarch32_ptrace_view to allow * access to the TLS register. */ - if (is_compat_task()) + if (is_a32_compat_task()) return &user_aarch32_view; - else if (is_compat_thread(task_thread_info(task))) + else if (is_a32_compat_thread(task_thread_info(task))) return &user_aarch32_ptrace_view; #endif return &user_aarch64_view; @@ -1232,7 +1231,7 @@ static void tracehook_report_syscall(struct pt_regs *regs, * A scratch register (ip(r12) on AArch32, x7 on AArch64) is * used to denote syscall entry/exit: */ - regno = (is_compat_task() ? 12 : 7); + regno = (is_a32_compat_task() ? 12 : 7); saved_reg = regs->regs[regno]; regs->regs[regno] = dir; @@ -1343,7 +1342,7 @@ int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task) if (!test_tsk_thread_flag(task, TIF_SINGLESTEP)) regs->pstate &= ~DBG_SPSR_SS; - if (is_compat_thread(task_thread_info(task))) + if (is_a32_compat_thread(task_thread_info(task))) return valid_compat_regs(regs); else return valid_native_regs(regs); diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c index a8eafdb..be02f65 100644 --- a/arch/arm64/kernel/signal.c +++ b/arch/arm64/kernel/signal.c @@ -276,7 +276,7 @@ static int setup_rt_frame(int usig, struct ksignal *ksig, sigset_t *set, static void setup_restart_syscall(struct pt_regs *regs) { - if (is_compat_task()) + if (is_a32_compat_task()) compat_setup_restart_syscall(regs); else regs->regs[8] = __NR_restart_syscall; @@ -295,7 +295,7 @@ static void handle_signal(struct ksignal *ksig, struct pt_regs *regs) /* * Set up the stack frame */ - if (is_compat_task()) { + if (is_a32_compat_task()) { if (ksig->ka.sa.sa_flags & SA_SIGINFO) ret = compat_setup_rt_frame(usig, ksig, oldset, regs); else diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c index 85461e8..515444a 100644 --- a/arch/arm64/kernel/traps.c +++ b/arch/arm64/kernel/traps.c @@ -18,6 +18,7 @@ */ #include +#include #include #include #include @@ -411,7 +412,7 @@ asmlinkage long do_ni_syscall(struct pt_regs *regs) { #ifdef CONFIG_AARCH32_EL0 long ret; - if (is_compat_task()) { + if (is_a32_compat_task()) { ret = compat_arm_syscall(regs); if (ret != -ENOSYS) return ret; -- 2.5.0