From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754094AbcE1Jfy (ORCPT ); Sat, 28 May 2016 05:35:54 -0400 Received: from szxga03-in.huawei.com ([119.145.14.66]:37643 "EHLO szxga03-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753918AbcE1Jfv (ORCPT ); Sat, 28 May 2016 05:35:51 -0400 From: Kefeng Wang To: Thomas Gleixner , Daniel Lezcano , Rob Herring CC: , , , , Sudeep Holla , Arnd Bergmann , Subject: [PATCH 0/4] Support hisilicon 64bit mode timer Date: Sat, 28 May 2016 17:33:49 +0800 Message-ID: <1464428033-52106-1-git-send-email-wangkefeng.wang@huawei.com> X-Mailer: git-send-email 1.7.12.4 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.175.102.37] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020202.57496652.0118,ss=1,re=0.000,recu=0.000,reip=0.000,cl=1,cld=1,fgs=0, ip=0.0.0.0, so=2013-05-26 15:14:31, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 813edd9ab1dabb6a6b7dc1c963aa0879 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org There is a kind of 64bit mode timer in hisilicon soc(like Hip05, Hip06 and some arm32 soc), it is very similar with ARM sp804 Dual Timers, but TimerX LOAD/Value/BGLoad are 64bit(two 32bit regs), and reg offset is different. This patchset make some cleanup and enable 64bit mode timer for hisilicon. Kefeng Wang (4): clocksource: sp804: cleanup clk_get_sys() clocksource: sp804: introduce helper sp804_load_mode_set() clocksource: sp804: use sp804_timer_disable() where possible clocksource: sp804: support 64bit mode for hisilicon timer64 .../devicetree/bindings/timer/arm,sp804.txt | 1 + drivers/clocksource/timer-sp.h | 1 + drivers/clocksource/timer-sp804.c | 142 +++++++++++++-------- 3 files changed, 92 insertions(+), 52 deletions(-) -- 1.7.12.4