From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753220AbcE1Jfa (ORCPT ); Sat, 28 May 2016 05:35:30 -0400 Received: from szxga03-in.huawei.com ([119.145.14.66]:37437 "EHLO szxga03-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751406AbcE1Jf2 (ORCPT ); Sat, 28 May 2016 05:35:28 -0400 From: Kefeng Wang To: Thomas Gleixner , Daniel Lezcano , Rob Herring CC: , , , , Sudeep Holla , Arnd Bergmann , Subject: [PATCH 2/4] clocksource: sp804: introduce helper sp804_load_mode_set() Date: Sat, 28 May 2016 17:33:51 +0800 Message-ID: <1464428033-52106-3-git-send-email-wangkefeng.wang@huawei.com> X-Mailer: git-send-email 1.7.12.4 In-Reply-To: <1464428033-52106-1-git-send-email-wangkefeng.wang@huawei.com> References: <1464428033-52106-1-git-send-email-wangkefeng.wang@huawei.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.175.102.37] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020206.57496652.00B8,ss=1,re=0.000,recu=0.000,reip=0.000,cl=1,cld=1,fgs=0, ip=0.0.0.0, so=2013-05-26 15:14:31, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 0dd3e262c1617812922067a7427485d8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Introduce helper sp804_load_mode_set(), and use it, prepare for 64bit mode timer support. Signed-off-by: Kefeng Wang --- drivers/clocksource/timer-sp804.c | 27 +++++++++++++-------------- 1 file changed, 13 insertions(+), 14 deletions(-) diff --git a/drivers/clocksource/timer-sp804.c b/drivers/clocksource/timer-sp804.c index 362e5d0..b8848e5 100644 --- a/drivers/clocksource/timer-sp804.c +++ b/drivers/clocksource/timer-sp804.c @@ -73,6 +73,15 @@ static long __init sp804_get_clock_rate(struct clk *clk, const char *name) return rate; } +static inline void sp804_load_mode_set(void __iomem *base, unsigned long load, int mode) +{ + unsigned long ctrl = TIMER_CTRL_32BIT | TIMER_CTRL_IE | + mode | TIMER_CTRL_ENABLE; + + writel(load, base + TIMER_LOAD); + writel(ctrl, base + TIMER_CTRL); +} + static void __iomem *sched_clock_base; static u64 notrace sp804_read(void) @@ -97,10 +106,8 @@ void __init __sp804_clocksource_and_sched_clock_init(void __iomem *base, /* setup timer 0 as free-running clocksource */ writel(0, base + TIMER_CTRL); - writel(0xffffffff, base + TIMER_LOAD); writel(0xffffffff, base + TIMER_VALUE); - writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC, - base + TIMER_CTRL); + sp804_load_mode_set(base, 0xffffffff, TIMER_CTRL_PERIODIC & ~TIMER_CTRL_IE); clocksource_mmio_init(base + TIMER_VALUE, name, rate, 200, 32, clocksource_mmio_readl_down); @@ -143,24 +150,16 @@ static int sp804_shutdown(struct clock_event_device *evt) static int sp804_set_periodic(struct clock_event_device *evt) { - unsigned long ctrl = TIMER_CTRL_32BIT | TIMER_CTRL_IE | - TIMER_CTRL_PERIODIC | TIMER_CTRL_ENABLE; - timer_shutdown(evt); - writel(clkevt_reload, clkevt_base + TIMER_LOAD); - writel(ctrl, clkevt_base + TIMER_CTRL); + sp804_load_mode_set(clkevt_base, clkevt_reload, TIMER_CTRL_PERIODIC); return 0; } static int sp804_set_next_event(unsigned long next, - struct clock_event_device *evt) + struct clock_event_device *evt) { - unsigned long ctrl = TIMER_CTRL_32BIT | TIMER_CTRL_IE | - TIMER_CTRL_ONESHOT | TIMER_CTRL_ENABLE; - - writel(next, clkevt_base + TIMER_LOAD); - writel(ctrl, clkevt_base + TIMER_CTRL); + sp804_load_mode_set(clkevt_base, next, TIMER_CTRL_ONESHOT); return 0; } -- 1.7.12.4