From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752091AbcFBFzo (ORCPT ); Thu, 2 Jun 2016 01:55:44 -0400 Received: from mailout4.w1.samsung.com ([210.118.77.14]:39432 "EHLO mailout4.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751210AbcFBFzk (ORCPT ); Thu, 2 Jun 2016 01:55:40 -0400 X-AuditID: cbfec7f4-f796c6d000001486-3e-574fca590bab From: Krzysztof Kozlowski To: Kukjin Kim , Krzysztof Kozlowski , Javier Martinez Canillas , Arnd Bergmann , Olof Johansson , linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Kevin Hilman , Bartlomiej Zolnierkiewicz Subject: [PATCH 3/4] ARM: multi_v7_defconfig: Enable s5p-secss driver Date: Thu, 02 Jun 2016 07:55:15 +0200 Message-id: <1464846916-3110-3-git-send-email-k.kozlowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1464846916-3110-1-git-send-email-k.kozlowski@samsung.com> References: <1464846916-3110-1-git-send-email-k.kozlowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrFLMWRmVeSWpSXmKPExsVy+t/xq7qRp/zDDa6t5rL4O+kYu8XGGetZ Ld68XcNk8fqFoUX/49fMFk83P2ay2PT4GqvF5V1z2CxmnN/HZHHq+mc2By6P378mMXpsWtXJ 5rF5Sb3HlRNNrB5b+u+ye/RtWcXo8XmTXAB7FJdNSmpOZllqkb5dAlfGj7V3mQte8lZMvr2G vYFxM2cXIyeHhICJxIeXL5ggbDGJC/fWs3UxcnEICSxllFj7/CsjhNPIJPFt8nZGkCo2AWOJ zcuXgFWJCGxhkni6dAFYO7NArMStq2+AbA4OYQFXiVcPikHCLAKqEqvfnWQFCfMKuEmsmaEI sUxO4uSxyawgNqeAu8T8l4vZQGwhoJLvq7ewTGDkXcDIsIpRNLU0uaA4KT3XUK84Mbe4NC9d Lzk/dxMjJAS/7GBcfMzqEKMAB6MSD+8KTf9wIdbEsuLK3EOMEhzMSiK8MkeBQrwpiZVVqUX5 8UWlOanFhxilOViUxHnn7nofIiSQnliSmp2aWpBaBJNl4uCUamA03T81bGpbjtOZk7PPV9RF HHdtyXirdG7nk18qQWvm6V14vuS6objybv4wo+LNvgH3c+/af43tEdiYEnnvSoqI6PG3bJf3 9s67YZjzYONTmWcS02L/3p+u/2bl1pgZDp+fhjVzyLguXvNm+6qQoIuBE2ZPaFCMN7WqVLn4 6dQcCc/rRQXXL2kwK7EUZyQaajEXFScCAPrtntQ9AgAA Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Exynos SoC provides a Security SubSystem block for accelerating some cryptographic operations. Enable the driver for it - s5p-secss to utilize the hardware acceleration. Currently the s5p-secss driver supports AES in CBC and ECB modes. However its usefulness could be doubted. Excerpt of tests on Odroid XU3 (Exynos5422), for 256 bit key, encryption, performance CPU freq governor: algorithm | block size [b] | average speed [MB/s] | cbc-aes-s5p | 16 | 11.5 | cbc-aes-s5p | 64 | 25.4 | cbc-aes-s5p | 256 | 41.0 | cbc-aes-s5p | 1024 | 47.4 | cbc-aes-s5p | 8192 | 49.0 | cbc(aes-generic) | 16 | 0.4 | cbc(aes-generic) | 64 | 1.8 | cbc(aes-generic) | 256 | 6.6 | cbc(aes-generic) | 1024 | 25.2 | cbc(aes-generic) | 8192 | 83.1 | Anyway enable the driver so it will get some testing coverage by community. Signed-off-by: Krzysztof Kozlowski --- arch/arm/configs/multi_v7_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig index 68cb3c766c39..ee7c884ab5d8 100644 --- a/arch/arm/configs/multi_v7_defconfig +++ b/arch/arm/configs/multi_v7_defconfig @@ -875,6 +875,7 @@ CONFIG_KEYSTONE_IRQ=y CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_ST=y CONFIG_CRYPTO_DEV_MARVELL_CESA=m +CONFIG_CRYPTO_DEV_S5P=m CONFIG_CRYPTO_DEV_SUN4I_SS=m CONFIG_CRYPTO_DEV_ROCKCHIP=m CONFIG_ARM_CRYPTO=y -- 1.9.1