From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932630AbcFBJkW (ORCPT ); Thu, 2 Jun 2016 05:40:22 -0400 Received: from e33.co.us.ibm.com ([32.97.110.151]:49778 "EHLO e33.co.us.ibm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932166AbcFBJkS (ORCPT ); Thu, 2 Jun 2016 05:40:18 -0400 X-IBM-Helo: d03dlp03.boulder.ibm.com X-IBM-MailFrom: aneesh.kumar@linux.vnet.ibm.com X-IBM-RcptTo: mpe@ellerman.id.au;linux-mm@kvack.org;akpm@linux-foundation.org;linux-kernel@vger.kernel.org From: "Aneesh Kumar K.V" To: akpm@linux-foundation.org, mpe@ellerman.id.au Cc: linux-mm@kvack.org, linux-kernel@vger.kernel.org, "Aneesh Kumar K.V" Subject: [PATCH 4/4] powerpc/mm/radix: Implement tlb mmu gather flush efficiently Date: Thu, 2 Jun 2016 15:09:49 +0530 Message-Id: <1464860389-29019-4-git-send-email-aneesh.kumar@linux.vnet.ibm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1464860389-29019-1-git-send-email-aneesh.kumar@linux.vnet.ibm.com> References: <1464860389-29019-1-git-send-email-aneesh.kumar@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 X-Content-Scanned: Fidelis XPS MAILER x-cbid: 16060209-0009-0000-0000-000037F6550C X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Now that we track page size in mmu_gather, we can use address based tlbie format when doing a tlb_flush(). We don't do this if we are invalidating the full address space. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/mm/tlb-radix.c | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/mm/tlb-radix.c b/arch/powerpc/mm/tlb-radix.c index 6f06b0b04d71..e581a521a87e 100644 --- a/arch/powerpc/mm/tlb-radix.c +++ b/arch/powerpc/mm/tlb-radix.c @@ -261,11 +261,37 @@ void radix__flush_tlb_range(struct vm_area_struct *vma, unsigned long start, } EXPORT_SYMBOL(radix__flush_tlb_range); +static int radix_get_mmu_psize(int page_size) +{ + int psize; + + if (page_size == (1UL << mmu_psize_defs[mmu_virtual_psize].shift)) + psize = mmu_virtual_psize; + else if (page_size == (1UL << mmu_psize_defs[MMU_PAGE_2M].shift)) + psize = MMU_PAGE_2M; + else if (page_size == (1UL << mmu_psize_defs[MMU_PAGE_1G].shift)) + psize = MMU_PAGE_1G; + else + return -1; + return psize; +} void radix__tlb_flush(struct mmu_gather *tlb) { + int psize = 0; struct mm_struct *mm = tlb->mm; - radix__flush_tlb_mm(mm); + int page_size = tlb->page_size; + + psize = radix_get_mmu_psize(page_size); + if (psize == -1) + /* unknown page size */ + goto flush_mm; + + if (!tlb->fullmm && !tlb->need_flush_all) + radix__flush_tlb_range_psize(mm, tlb->start, tlb->end, psize); + else +flush_mm: + radix__flush_tlb_mm(mm); } /* * flush the page walk cache for the address -- 2.7.4