From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751476AbcFCBeE (ORCPT ); Thu, 2 Jun 2016 21:34:04 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:49234 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751099AbcFCBeC (ORCPT ); Thu, 2 Jun 2016 21:34:02 -0400 X-IBM-Helo: d23dlp02.au.ibm.com X-IBM-MailFrom: benh@au1.ibm.com X-IBM-RcptTo: linux-kernel@vger.kernel.org Subject: Re: [PATCH v5 1/6] qspinlock: powerpc support qspinlock From: Benjamin Herrenschmidt Reply-To: benh@au1.ibm.com To: Pan Xinhui , linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.orgv, virtualization@lists.linux-foundation.org Cc: paulus@samba.org, mpe@ellerman.id.au, peterz@infradead.org, mingo@redhat.com, paulmck@linux.vnet.ibm.com, waiman.long@hpe.com Date: Fri, 03 Jun 2016 11:32:28 +1000 In-Reply-To: <1464917520.26773.11.camel@kernel.crashing.org> References: <1464859370-5162-1-git-send-email-xinhui.pan@linux.vnet.ibm.com> <1464859370-5162-3-git-send-email-xinhui.pan@linux.vnet.ibm.com> <1464917520.26773.11.camel@kernel.crashing.org> Organization: IBM Australia Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.18.5.2 (3.18.5.2-1.fc23) Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 16060301-0048-0000-0000-0000018D99A1 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 16060301-0049-0000-0000-000045DD9949 Message-Id: <1464917548.26773.12.camel@au1.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2016-06-02_12:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1604210000 definitions=main-1606030017 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 2016-06-03 at 11:32 +1000, Benjamin Herrenschmidt wrote: > On Thu, 2016-06-02 at 17:22 +0800, Pan Xinhui wrote: > > > > Base code to enable qspinlock on powerpc. this patch add some > > #ifdef > > here and there. Although there is no paravirt related code, we can > > successfully build a qspinlock kernel after apply this patch. > This is missing the IO_SYNC stuff ... It means we'll fail to do a > full > sync to order vs MMIOs. > > You need to add that back in the unlock path. Well, and in the lock path as well... Cheers, Ben. > > > > Signed-off-by: Pan Xinhui > > --- > >  arch/powerpc/include/asm/qspinlock.h      | 26 > > ++++++++++++++++++++++++++ > >  arch/powerpc/include/asm/spinlock.h       | 27 +++++++++++++++---- > > -------- > >  arch/powerpc/include/asm/spinlock_types.h |  4 ++++ > >  arch/powerpc/lib/locks.c                  |  4 ++++ > >  4 files changed, 49 insertions(+), 12 deletions(-) > >  create mode 100644 arch/powerpc/include/asm/qspinlock.h > > > > diff --git a/arch/powerpc/include/asm/qspinlock.h > > b/arch/powerpc/include/asm/qspinlock.h > > new file mode 100644 > > index 0000000..fc83cd2 > > --- /dev/null > > +++ b/arch/powerpc/include/asm/qspinlock.h > > @@ -0,0 +1,26 @@ > > +#ifndef _ASM_POWERPC_QSPINLOCK_H > > +#define _ASM_POWERPC_QSPINLOCK_H > > + > > +#include > > + > > +#define SPIN_THRESHOLD (1 << 15) > > +#define queued_spin_unlock queued_spin_unlock > > + > > +static inline void native_queued_spin_unlock(struct qspinlock > > *lock) > > +{ > > + u8 *locked = (u8 *)lock; > > +#ifdef __BIG_ENDIAN > > + locked += 3; > > +#endif > > + /* no load/store can be across the unlock()*/ > > + smp_store_release(locked, 0); > > +} > > + > > +static inline void queued_spin_unlock(struct qspinlock *lock) > > +{ > > + native_queued_spin_unlock(lock); > > +} > > + > > +#include > > + > > +#endif /* _ASM_POWERPC_QSPINLOCK_H */ > > diff --git a/arch/powerpc/include/asm/spinlock.h > > b/arch/powerpc/include/asm/spinlock.h > > index 523673d..4359ee6 100644 > > --- a/arch/powerpc/include/asm/spinlock.h > > +++ b/arch/powerpc/include/asm/spinlock.h > > @@ -52,6 +52,20 @@ > >  #define SYNC_IO > >  #endif > >   > > +#if defined(CONFIG_PPC_SPLPAR) > > +/* We only yield to the hypervisor if we are in shared processor > > mode */ > > +#define SHARED_PROCESSOR (lppaca_shared_proc(local_paca- > > > > > > lppaca_ptr)) > > +extern void __spin_yield(arch_spinlock_t *lock); > > +extern void __rw_yield(arch_rwlock_t *lock); > > +#else /* SPLPAR */ > > +#define __spin_yield(x) barrier() > > +#define __rw_yield(x) barrier() > > +#define SHARED_PROCESSOR 0 > > +#endif > > + > > +#ifdef CONFIG_QUEUED_SPINLOCKS > > +#include > > +#else > >  static __always_inline int > > arch_spin_value_unlocked(arch_spinlock_t > > lock) > >  { > >   return lock.slock == 0; > > @@ -106,18 +120,6 @@ static inline int > > arch_spin_trylock(arch_spinlock_t *lock) > >   * held.  Conveniently, we have a word in the paca that holds this > >   * value. > >   */ > > - > > -#if defined(CONFIG_PPC_SPLPAR) > > -/* We only yield to the hypervisor if we are in shared processor > > mode */ > > -#define SHARED_PROCESSOR (lppaca_shared_proc(local_paca- > > > > > > lppaca_ptr)) > > -extern void __spin_yield(arch_spinlock_t *lock); > > -extern void __rw_yield(arch_rwlock_t *lock); > > -#else /* SPLPAR */ > > -#define __spin_yield(x) barrier() > > -#define __rw_yield(x) barrier() > > -#define SHARED_PROCESSOR 0 > > -#endif > > - > >  static inline void arch_spin_lock(arch_spinlock_t *lock) > >  { > >   CLEAR_IO_SYNC; > > @@ -169,6 +171,7 @@ extern void > > arch_spin_unlock_wait(arch_spinlock_t > > *lock); > >   do { while (arch_spin_is_locked(lock)) cpu_relax(); } > > while > > (0) > >  #endif > >   > > +#endif /* !CONFIG_QUEUED_SPINLOCKS */ > >  /* > >   * Read-write spinlocks, allowing multiple readers > >   * but only one writer. > > diff --git a/arch/powerpc/include/asm/spinlock_types.h > > b/arch/powerpc/include/asm/spinlock_types.h > > index 2351adc..bd7144e 100644 > > --- a/arch/powerpc/include/asm/spinlock_types.h > > +++ b/arch/powerpc/include/asm/spinlock_types.h > > @@ -5,11 +5,15 @@ > >  # error "please don't include this file directly" > >  #endif > >   > > +#ifdef CONFIG_QUEUED_SPINLOCKS > > +#include > > +#else > >  typedef struct { > >   volatile unsigned int slock; > >  } arch_spinlock_t; > >   > >  #define __ARCH_SPIN_LOCK_UNLOCKED { 0 } > > +#endif > >   > >  typedef struct { > >   volatile signed int lock; > > diff --git a/arch/powerpc/lib/locks.c b/arch/powerpc/lib/locks.c > > index f7deebd..a9ebd71 100644 > > --- a/arch/powerpc/lib/locks.c > > +++ b/arch/powerpc/lib/locks.c > > @@ -23,6 +23,7 @@ > >  #include > >  #include > >   > > +#ifndef CONFIG_QUEUED_SPINLOCKS > >  void __spin_yield(arch_spinlock_t *lock) > >  { > >   unsigned int lock_value, holder_cpu, yield_count; > > @@ -42,6 +43,7 @@ void __spin_yield(arch_spinlock_t *lock) > >   get_hard_smp_processor_id(holder_cpu), > > yield_count); > >  } > >  EXPORT_SYMBOL_GPL(__spin_yield); > > +#endif > >   > >  /* > >   * Waiting for a read lock or a write lock on a rwlock... > > @@ -69,6 +71,7 @@ void __rw_yield(arch_rwlock_t *rw) > >  } > >  #endif > >   > > +#ifndef CONFIG_QUEUED_SPINLOCKS > >  void arch_spin_unlock_wait(arch_spinlock_t *lock) > >  { > >   smp_mb(); > > @@ -84,3 +87,4 @@ void arch_spin_unlock_wait(arch_spinlock_t *lock) > >  } > >   > >  EXPORT_SYMBOL(arch_spin_unlock_wait); > > +#endif