From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1161116AbcFJWEZ (ORCPT ); Fri, 10 Jun 2016 18:04:25 -0400 Received: from down.free-electrons.com ([37.187.137.238]:44203 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1161051AbcFJWEW (ORCPT ); Fri, 10 Jun 2016 18:04:22 -0400 From: Alexandre Belloni To: Nicolas Ferre Cc: Boris Brezillon , Jean-Christophe Plagniol-Villard , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Alexandre Belloni Subject: [PATCH 40/48] ARM: dts: at91: sama5d2: TC blocks are also simple-mfd and syscon devices Date: Sat, 11 Jun 2016 00:03:43 +0200 Message-Id: <1465596231-21766-41-git-send-email-alexandre.belloni@free-electrons.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1465596231-21766-1-git-send-email-alexandre.belloni@free-electrons.com> References: <1465596231-21766-1-git-send-email-alexandre.belloni@free-electrons.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add simple-mfd and syscon to the TC blocks to allow to register one of the channels as clocksource properly at boot time. It also allows to use regmap instead of tclib. Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/sama5d2.dtsi | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 2827e7ab5ebc..0db2f8b77227 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -906,7 +906,9 @@ }; tcb0: timer@f800c000 { - compatible = "atmel,at91sam9x5-tcb"; + compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon"; + #address-cells = <1>; + #size-cells = <0>; reg = <0xf800c000 0x100>; interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&tcb0_clk>, <&clk32k>; @@ -914,7 +916,9 @@ }; tcb1: timer@f8010000 { - compatible = "atmel,at91sam9x5-tcb"; + compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon"; + #address-cells = <1>; + #size-cells = <0>; reg = <0xf8010000 0x100>; interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&tcb1_clk>, <&clk32k>; -- 2.8.1