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From: kan.liang@intel.com
To: peterz@infradead.org, tglx@linutronix.de, linux-kernel@vger.kernel.org
Cc: ak@linux.intel.com, eranian@google.com, Kan Liang <kan.liang@intel.com>
Subject: [PATCH V3 2/2] perf/x86/intel/uncore: add enable_box for client msr uncore
Date: Wed, 29 Jun 2016 07:01:52 -0700	[thread overview]
Message-ID: <1467208912-8179-2-git-send-email-kan.liang@intel.com> (raw)
In-Reply-To: <1467208912-8179-1-git-send-email-kan.liang@intel.com>

From: Kan Liang <kan.liang@intel.com>

PERF_GLOBAL_CTL could be cleared after Package C7. This patch tries to
workaround this issue by re-enable PERF_GLOBAL_CTL in enable_box.
The workaround does not cover all cases. It helps for new events after
returning from C7.
There is no drawback in letting the thing enabled, so it does not need
disable_box here.

Signed-off-by: Kan Liang <kan.liang@intel.com>
---
 arch/x86/events/intel/uncore_snb.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/x86/events/intel/uncore_snb.c b/arch/x86/events/intel/uncore_snb.c
index 97a69db..9d35ec0 100644
--- a/arch/x86/events/intel/uncore_snb.c
+++ b/arch/x86/events/intel/uncore_snb.c
@@ -100,6 +100,12 @@ static void snb_uncore_msr_init_box(struct intel_uncore_box *box)
 	}
 }
 
+static void snb_uncore_msr_enable_box(struct intel_uncore_box *box)
+{
+	wrmsrl(SNB_UNC_PERF_GLOBAL_CTL,
+		SNB_UNC_GLOBAL_CTL_EN | SNB_UNC_GLOBAL_CTL_CORE_ALL);
+}
+
 static void snb_uncore_msr_exit_box(struct intel_uncore_box *box)
 {
 	if (box->pmu->pmu_idx == 0)
@@ -127,6 +133,7 @@ static struct attribute_group snb_uncore_format_group = {
 
 static struct intel_uncore_ops snb_uncore_msr_ops = {
 	.init_box	= snb_uncore_msr_init_box,
+	.enable_box	= snb_uncore_msr_enable_box,
 	.exit_box	= snb_uncore_msr_exit_box,
 	.disable_event	= snb_uncore_msr_disable_event,
 	.enable_event	= snb_uncore_msr_enable_event,
@@ -192,6 +199,12 @@ static void skl_uncore_msr_init_box(struct intel_uncore_box *box)
 	}
 }
 
+static void skl_uncore_msr_enable_box(struct intel_uncore_box *box)
+{
+	wrmsrl(SKL_UNC_PERF_GLOBAL_CTL,
+		SNB_UNC_GLOBAL_CTL_EN | SKL_UNC_GLOBAL_CTL_CORE_ALL);
+}
+
 static void skl_uncore_msr_exit_box(struct intel_uncore_box *box)
 {
 	if (box->pmu->pmu_idx == 0)
@@ -200,6 +213,7 @@ static void skl_uncore_msr_exit_box(struct intel_uncore_box *box)
 
 static struct intel_uncore_ops skl_uncore_msr_ops = {
 	.init_box	= skl_uncore_msr_init_box,
+	.enable_box	= skl_uncore_msr_enable_box,
 	.exit_box	= skl_uncore_msr_exit_box,
 	.disable_event	= snb_uncore_msr_disable_event,
 	.enable_event	= snb_uncore_msr_enable_event,
-- 
2.4.0

  reply	other threads:[~2016-06-29 21:16 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-29 14:01 [PATCH V3 1/2] perf/x86/intel/uncore: Add support for Intel SKL client uncore kan.liang
2016-06-29 14:01 ` kan.liang [this message]
2016-08-10 10:58   ` [PATCH V3 2/2] perf/x86/intel/uncore: add enable_box for client msr uncore Ingo Molnar
2016-07-07  8:31 ` [tip:perf/core] perf/x86/intel/uncore: Add support for the Intel Skylake client uncore PMU tip-bot for Kan Liang

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