From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751781AbcGGMOZ (ORCPT ); Thu, 7 Jul 2016 08:14:25 -0400 Received: from mailout4.samsung.com ([203.254.224.34]:34778 "EHLO mailout4.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750922AbcGGMOF (ORCPT ); Thu, 7 Jul 2016 08:14:05 -0400 X-AuditID: cbfee68d-f79876d000001436-68-577e478a4efe From: Andi Shyti To: Chanwoo Choi Cc: Jaehoon Chung , Sylwester Nawrocki , Tomasz Figa , Michael Turquette , Stephen Boyd , Kukjin Kim , Krzysztof Kozlowski , linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Andi Shyti , Andi Shyti Subject: [PATCH v4 1/2] clk: exynos5433: do not use CLK_IGNORE_UNUSED for SPI clocks Date: Thu, 07 Jul 2016 21:13:56 +0900 Message-id: <1467893637-12573-2-git-send-email-andi.shyti@samsung.com> X-Mailer: git-send-email 2.8.1 In-reply-to: <1467893637-12573-1-git-send-email-andi.shyti@samsung.com> References: <1467893637-12573-1-git-send-email-andi.shyti@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupikeLIzCtJLcpLzFFi42JZI2JSqNvlXhduMHGVqsX2I89YLRb/eM5k cf3Lc1aLG7/aWC1evzC06H/8mtli0+NrrBYfe+6xWlzeNYfNYsb5fUwWF0+5Whx+085q8eNM N4vFql1/GB34PN7faGX3uNzXy+RxfcknZo+ds+6ye2xa1cnmsXlJvUffllWMHp83yQVwRHHZ pKTmZJalFunbJXBl9B28yVbwgafi2a2LTA2ME7m7GDk5JARMJFY/62GCsMUkLtxbz9bFyMUh JLCCUeLz+q2sMEWnr61nh0jMYpSY0D2FBcL5yCjx7uJbZpAqNgFNiabbP9hAbBEBDYmZf68w gtjMAp+YJT72+YDYwgJhEtfPHAZbxyKgKvHl6j6gQRwcvAJuEk+OsEEsk5O4PP0BmM0p4C5x ZN0nsPFCQCX9Pw4xg+yVEHjELrFw7RyoOQIS3yYfApsjISArsekAM8QcSYmDK26wTGAUXsDI sIpRNLUguaA4Kb3IUK84Mbe4NC9dLzk/dxMjMIpO/3vWu4Px9gHrQ4wCHIxKPLwHOmrDhVgT y4orcw8xmgJtmMgsJZqcD4zVvJJ4Q2MzIwtTE1NjI3NLMyVxXkWpn8FCAumJJanZqakFqUXx RaU5qcWHGJk4OKUaGKXED13aGOYYwLZ2TZ/KI+OXed2W5Y+WFqc8r/zuzxnqf3+v7PWW/Z/i T8wVSbt3M746ZFdJ6dL5V/4d5nqgeWUaUzBj7tK29qydn94lWLdOW5qe9o6Lf7Y7z/Zjhy5u vb+n8Bsje6drtOjswws2zP42M+iriY2QfNoJnkq5TvYz7m5hq2KkFiixFGckGmoxFxUnAgAN JvIXnQIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrOIsWRmVeSWpSXmKPExsVy+t9jQd0u97pwg6lX5S22H3nGarH4x3Mm i+tfnrNa3PjVxmrx+oWhRf/j18wWmx5fY7X42HOP1eLyrjlsFjPO72OyuHjK1eLwm3ZWix9n ulksVu36w+jA5/H+Riu7x+W+XiaP60s+MXvsnHWX3WPTqk42j81L6j36tqxi9Pi8SS6AI6qB 0SYjNTEltUghNS85PyUzL91WyTs43jne1MzAUNfQ0sJcSSEvMTfVVsnFJ0DXLTMH6GwlhbLE nFKgUEBicbGSvh2mCaEhbroWMI0Rur4hQXA9RgZoIGENY0bfwZtsBR94Kp7dusjUwDiRu4uR k0NCwETi9LX17BC2mMSFe+vZuhi5OIQEZjFKTOiewgLhfGSUeHfxLTNIFZuApkTT7R9sILaI gIbEzL9XGEFsZoFPzBIf+3xAbGGBMInrZw4zgdgsAqoSX67uAxrEwcEr4Cbx5AgbxDI5icvT H4DZnALuEkfWfQIbLwRU0v/jEPMERt4FjAyrGCVSC5ILipPSc43yUsv1ihNzi0vz0vWS83M3 MYIj9Zn0DsbDu9wPMQpwMCrx8C7IqQ0XYk0sK67MPcQowcGsJMLr4VIXLsSbklhZlVqUH19U mpNafIjRFOiuicxSosn5wCSSVxJvaGxiZmRpZG5oYWRsriTO+/j/ujAhgfTEktTs1NSC1CKY PiYOTqkGxl1sN/1DAsU2lO7um6+w+DvngsfH5fb929B43Y19pt6j1X7dpnse64S1N635vura Wt6IkHT3J1PKfLxXTFC8oMzt4s3aE6nx9Mi7O8FiyfuiHF62CE5aUNO+ernW/fyUT7uNS5yO BZQFzQ45+4Tr7vM5Is4cDgsVYs69/y9zKOS/qnysr6nzESWW4oxEQy3mouJEACqE8aTqAgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The CLK_IGNORE_UNUSED flag has to be avoided whenever possible. Use the CLK_IS_CRITICAL flag instead for critical SPI1 clocks, which enables the clock line during boot time. Suggested-by: Tomasz Figa Signed-off-by: Andi Shyti --- drivers/clk/samsung/clk-exynos5433.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c index c3a5318..337387b 100644 --- a/drivers/clk/samsung/clk-exynos5433.c +++ b/drivers/clk/samsung/clk-exynos5433.c @@ -1662,7 +1662,7 @@ static struct samsung_gate_clock peric_gate_clks[] __initdata = { ENABLE_SCLK_PERIC, 13, CLK_SET_RATE_PARENT, 0), GATE(CLK_SCLK_IOCLK_SPI1, "sclk_ioclk_spi1", "ioclk_spi1_clk_in", ENABLE_SCLK_PERIC, 12, - CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0), + CLK_IS_CRITICAL | CLK_SET_RATE_PARENT, 0), GATE(CLK_SCLK_IOCLK_SPI0, "sclk_ioclk_spi0", "ioclk_spi0_clk_in", ENABLE_SCLK_PERIC, 11, CLK_SET_RATE_PARENT, 0), GATE(CLK_SCLK_IOCLK_I2S1_BCLK, "sclk_ioclk_i2s1_bclk", @@ -1677,7 +1677,7 @@ static struct samsung_gate_clock peric_gate_clks[] __initdata = { GATE(CLK_SCLK_SPI2, "sclk_spi2", "sclk_spi2_peric", ENABLE_SCLK_PERIC, 5, CLK_SET_RATE_PARENT, 0), GATE(CLK_SCLK_SPI1, "sclk_spi1", "sclk_spi1_peric", ENABLE_SCLK_PERIC, - 4, CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0), + 4, CLK_SET_RATE_PARENT, 0), GATE(CLK_SCLK_SPI0, "sclk_spi0", "sclk_spi0_peric", ENABLE_SCLK_PERIC, 3, CLK_SET_RATE_PARENT, 0), GATE(CLK_SCLK_UART2, "sclk_uart2", "sclk_uart2_peric", -- 2.8.1