From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754371AbcG0IcN (ORCPT ); Wed, 27 Jul 2016 04:32:13 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:14008 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1754117AbcG0Ibn (ORCPT ); Wed, 27 Jul 2016 04:31:43 -0400 From: Bibby Hsieh To: David Airlie , Matthias Brugger , Daniel Vetter , , CC: Yingjoe Chen , Cawa Cheng , Daniel Kurtz , Bibby Hsieh , Philipp Zabel , YT Shen , Thierry Reding , CK Hu , Mao Huang , , , Sascha Hauer Subject: [PATCH v2 0/3] MT8173 HDMI 4K support Date: Wed, 27 Jul 2016 16:31:29 +0800 Message-ID: <1469608292-6106-1-git-send-email-bibby.hsieh@mediatek.com> X-Mailer: git-send-email 1.7.9.5 MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This is MT8173 HDMI 4K support PATCH v2, based on 4.7-rc1. In order to support HDMI 4K on MT8173, we have to make some modifications. 1) Make sure that mtk_hdmi_send_infoframe is sent successfully. 2) Enhance the HDMI driving current to improve performance. 3) Make sure that pixel clock is 297MHz when resolution is 4K. Changes since v1: - According to the suggestion from philipp, We use the new dpi0_sel rate set method. - calls clk_set_rate to set the dpi0_sel according to the pixel clock. - Remove the direct access to all the intermediate clock part. - Remove the intermediate tvdpll_d* clocks in dts. - According to suggestion from CK, we rename the clock parse function and remove it from mtk_dpi_conf struct. - Merges the hdmi Pll set rate for pixel clock greater than 165MHz and smaller parts. The PATCH depends on the following patch: https://patchwork.kernel.org/patch/9249445/ (arm64: dts: mt8173: add mmsel clocks for 4K support) Thank you. Bibby Hsieh Junzhi Zhao (3): drm/mediatek: do mtk_hdmi_send_infoframe after HDMI clock enable drm/mediatek: enhance the HDMI driving current drm/mediatek: fix the wrong pixel clock when resolution is 4K drivers/gpu/drm/mediatek/mtk_dpi.c | 149 +++++++++++++++--------- drivers/gpu/drm/mediatek/mtk_hdmi.c | 19 +-- drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c | 42 +++++-- 3 files changed, 138 insertions(+), 72 deletions(-) -- 1.7.9.5