From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933641AbcHBHXp (ORCPT ); Tue, 2 Aug 2016 03:23:45 -0400 Received: from regular1.263xmail.com ([211.150.99.137]:39533 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751517AbcHBHWy (ORCPT ); Tue, 2 Aug 2016 03:22:54 -0400 X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 X-RL-SENDER: zhengxing@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 103.29.142.67 X-LOGIN-NAME: zhengxing@rock-chips.com X-UNIQUE-TAG: X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 From: Xing Zheng To: heiko@sntech.de Cc: linux-rockchip@lists.infradead.org, dianders@chromium.org, briannorris@chromium.org, huangtao@rock-chips.com, zhangqing@rock-chips.com, Xing Zheng , devicetree@vger.kernel.org, Jianqun Xu , frank.wang@rock-chips.com, shawn.lin@rock-chips.com, Michael Turquette , Kumar Gala , linux-kernel@vger.kernel.org, Ian Campbell , Stephen Boyd , Rob Herring , Pawel Moll , wulf@rock-chips.com, Mark Rutland , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 0/7] fix and optimize some clock configuration for the RK3399 platfom Date: Tue, 2 Aug 2016 15:19:54 +0800 Message-Id: <1470122401-31934-1-git-send-email-zhengxing@rock-chips.com> X-Mailer: git-send-email 1.7.9.5 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi: In the development work, we found that some of the previous incorrect clock configuration on the RK3399 platform, we should fix and optimize them. Changes in v3: - list more details of the testing steps - add the regresson message "Fixes: 3bd14ae9da91 ..." to track the previous commit - remove the patch "clk: rockchip: rk3399: fix incorrect parent for rk3399's {c, g}pll_aclk_perihp_src" - add "Reviewed-by: Shawn Lin " Changes in v2: - add this patch " clk: rockchip: rk3399: fix incorrect GATE bits for {c, g}pll_aclk_perihp_src" into the patchset Elaine Zhang (1): clk: rockchip: rk3399: delete the CLK_IGNORE_UNUSED for aclk_pcie Xing Zheng (6): clk: rockchip: rk3399: export USBPHYx_480M_SRC clock IDs clk: rockchip: rk3399: export 480M_SRC clock id for usbphy0/usbphy1 clk: rockchip: rk3399: fix incorrect GATE bits for {c, g}pll_aclk_perihp_src clk: rockchip: rk3399: fix incorrect aclk_emmc source gate bits clk: rockchip: rk3399: add 65MHz and 106.5MHz clocks for HDMI clk: rockchip: rk3399: Add support frac mode frequencies drivers/clk/rockchip/clk-rk3399.c | 39 ++++++++++++++++++++++++-------- include/dt-bindings/clock/rk3399-cru.h | 2 ++ 2 files changed, 32 insertions(+), 9 deletions(-) -- 1.7.9.5