From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752787AbcHLLri (ORCPT ); Fri, 12 Aug 2016 07:47:38 -0400 Received: from mail-wm0-f67.google.com ([74.125.82.67]:33427 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752325AbcHLLrB (ORCPT ); Fri, 12 Aug 2016 07:47:01 -0400 From: LABBE Corentin To: ohad@wizery.com, bjorn.andersson@linaro.org Cc: linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, LABBE Corentin Subject: [PATCH RFC 3/3] ARM: dts: sun8i: add hwspinlock device to sun8i-h3 Date: Fri, 12 Aug 2016 13:46:34 +0200 Message-Id: <1471002394-1106-3-git-send-email-clabbe.montjoie@gmail.com> X-Mailer: git-send-email 2.7.3 In-Reply-To: <1471002394-1106-1-git-send-email-clabbe.montjoie@gmail.com> References: <1471002394-1106-1-git-send-email-clabbe.montjoie@gmail.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the hwspinlock device tree node for the device present on H3. Signed-off-by: LABBE Corentin --- arch/arm/boot/dts/sun8i-h3.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index 439e8ed..c801389 100644 --- a/arch/arm/boot/dts/sun8i-h3.dtsi +++ b/arch/arm/boot/dts/sun8i-h3.dtsi @@ -489,6 +489,16 @@ status = "disabled"; }; + hwspinlock: hwspinlock@1c18000 { + compatible = "allwinner,sun8i-hwspinlock"; + reg = <0x01c18000 0x400>; + resets = <&ccu RST_BUS_SPINLOCK>; + reset-names = "ahb"; + clocks = <&ccu CLK_BUS_SPINLOCK>; + clock-names = "ahb"; + status = "disabled"; + }; + gic: interrupt-controller@01c81000 { compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; reg = <0x01c81000 0x1000>, -- 2.7.3