From: Jiri Olsa <jolsa@kernel.org>
To: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: lkml <linux-kernel@vger.kernel.org>,
Ingo Molnar <mingo@kernel.org>, Andi Kleen <andi@firstfloor.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>
Subject: [PATCH] perf/x86: Fix PEBs threshold initialization
Date: Thu, 18 Aug 2016 11:09:52 +0200 [thread overview]
Message-ID: <1471511392-29875-1-git-send-email-jolsa@kernel.org> (raw)
Latest PEBS rework change could skip initialization
of the ds->pebs_interrupt_threshold for single event
PEBS threshold events.
Making sure the PEBS threshold gets always initialized.
Fixes: 09e61b4f7849 ("perf/x86/intel: Rework the large PEBS setup code")
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
---
arch/x86/events/intel/ds.c | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
index 248023f54c87..9fe3db5325d1 100644
--- a/arch/x86/events/intel/ds.c
+++ b/arch/x86/events/intel/ds.c
@@ -834,14 +834,24 @@ static inline void pebs_update_threshold(struct cpu_hw_events *cpuc)
static void
pebs_update_state(bool needed_cb, struct cpu_hw_events *cpuc, struct pmu *pmu)
{
+ /*
+ * Make sure we get updated with the first PEBs
+ * event. It'll trigger also during removal, but
+ * that does not hurt.
+ */
+ bool update = cpuc->n_pebs == 1;
+
if (needed_cb != pebs_needs_sched_cb(cpuc)) {
if (!needed_cb)
perf_sched_cb_inc(pmu);
else
perf_sched_cb_dec(pmu);
- pebs_update_threshold(cpuc);
+ update = true;
}
+
+ if (update)
+ pebs_update_threshold(cpuc);
}
void intel_pmu_pebs_add(struct perf_event *event)
--
2.7.4
next reply other threads:[~2016-08-18 9:10 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-18 9:09 Jiri Olsa [this message]
2016-08-18 11:04 ` [tip:perf/core] perf/x86: Fix PEBS " tip-bot for Jiri Olsa
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