From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758045AbcHYGpw (ORCPT ); Thu, 25 Aug 2016 02:45:52 -0400 Received: from mail-pa0-f65.google.com ([209.85.220.65]:36310 "EHLO mail-pa0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751756AbcHYGpo (ORCPT ); Thu, 25 Aug 2016 02:45:44 -0400 From: Milo Kim To: Chen-Yu Tsai , Maxime Ripard Cc: Thierry Reding , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Milo Kim , Rob Herring Subject: [PATCH 2/2] ARM: dts: sun8i-h3: Add UART1 pinctrl Date: Thu, 25 Aug 2016 15:44:54 +0900 Message-Id: <1472107494-20740-2-git-send-email-woogyom.kim@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1472107494-20740-1-git-send-email-woogyom.kim@gmail.com> References: <1472107494-20740-1-git-send-email-woogyom.kim@gmail.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In H3, PA5 can be used as PWM and UART0. If the PWM is used, the console UART should be moved to other port. This patch enables UART1 pinctrl to support this case. PA5: PWM PG6, PG7: debug console Cc: Chen-Yu Tsai Cc: Maxime Ripard Cc: Rob Herring Signed-off-by: Milo Kim --- arch/arm/boot/dts/sun8i-h3.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index 3a965fb..fdb6801 100644 --- a/arch/arm/boot/dts/sun8i-h3.dtsi +++ b/arch/arm/boot/dts/sun8i-h3.dtsi @@ -526,6 +526,13 @@ allwinner,pull = ; }; + uart1_pins_a: uart1@0 { + allwinner,pins = "PG6", "PG7"; + allwinner,function = "uart1"; + allwinner,drive = ; + allwinner,pull = ; + }; + mmc0_pins_a: mmc0@0 { allwinner,pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; -- 1.9.1